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Register File Criticality and Compiler Optimization Effects on Embedded Microprocessor Reliability

IEEE transactions on nuclear science, 2017-08, Vol.64 (8), p.2179-2187

2017

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S-SETA: Selective Software-Only Error-Detection Technique Using Assertions

IEEE transactions on nuclear science, 2015-12, Vol.62 (6), p.3088-3095

2015

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Volltext

Reliability Calculation With Respect to Functional Failures Induced by Radiation in TMR Arm Cortex-M0 Soft-Core Embedded Into SRAM-Based FPGA

IEEE transactions on nuclear science, 2019-07, Vol.66 (7), p.1433-1440

2019

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Volltext

Hybrid soft error mitigation techniques for COTS processor-based systems

2016 17th Latin-American Test Symposium (LATS), 2016, p.99-104

2016

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Voltage Scaling Influence on the Soft Error Susceptibility of a FinFET-based Circuit

2021 IEEE 12th Latin America Symposium on Circuits and System (LASCAS), 2021, p.1-4

2021

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Volltext

Register file criticality on embedded microprocessor reliability

2016 16th European Conference on Radiation and Its Effects on Components and Systems (RADECS), 2016, p.1-5

2016

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Volltext

Evaluating the effectiveness of a diversity TMR scheme under neutrons

2013 14th European Conference on Radiation and Its Effects on Components and Systems (RADECS), 2013, p.1-5

2013

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Volltext

Reducing TMR overhead by combining approximate circuit, transistor topology and input permutation approaches

2013 26th Symposium on Integrated Circuits and Systems Design (SBCCI), 2013, p.1-6

2013

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Analyzing the Impact of Single-Event-Induced Charge Sharing in Complex Circuits

IEEE transactions on nuclear science, 2011-12, Vol.58 (6), p.2768-2775

2011

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Volltext

Using Bulk Built-in Current Sensors to Detect Soft Errors

IEEE MICRO, 2006-09, Vol.26 (5), p.10-18

2006

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Volltext

A Self-Checking Scheme to Mitigate Single Event Upset Effects in SRAM-Based FPAAs

IEEE transactions on nuclear science, 2009-08, Vol.56 (4), p.1950-1957

2009

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Volltext

Improving Reliability of SRAM-Based FPGAs by Inserting Redundant Routing

IEEE transactions on nuclear science, 2006-08, Vol.53 (4), p.2060-2068

2006

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Volltext

Dependable Network-on-Chip Router Able to Simultaneously Tolerate Soft Errors and Crosstalk

2006 IEEE International Test Conference, 2006, p.1-9

2006

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Volltext

Designing fault-tolerant techniques for SRAM-based FPGAs

IEEE design & test of computers, 2004-11, Vol.21 (6), p.552-562

2004

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Volltext

Crosstalk- and SEU-Aware Networks on Chips

IEEE design & test of computers, 2007-07, Vol.24 (4), p.340-350

2007

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Volltext

Evaluating large grain TMR and selective partial reconfiguration for soft error mitigation in SRAM-based FPGAs

2009 15th IEEE International On-Line Testing Symposium, 2009, p.101-106

2009

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Volltext

Improving error detection capability of a SpaceWire router IP

2011 12th European Conference on Radiation and Its Effects on Components and Systems, 2011, p.501-506

2011

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Volltext

Soft-Error Probability Due to SET in Clock Tree Networks

2012 IEEE Computer Society Annual Symposium on VLSI, 2012, p.338-343

2012

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Volltext

A broad strategy to detect crosstalk faults in network-on-chip interconnects

2010 18th IEEE/IFIP International Conference on VLSI and System-on-Chip, 2010, p.298-303

2010

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Volltext

Constrained placement methodology for reducing SER under single-event-induced charge sharing effects

2011 12th European Conference on Radiation and Its Effects on Components and Systems, 2011, p.132-137

2011

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Volltext

Evaluating SEU and crosstalk effects in network-on-chip routers

12th IEEE International On-Line Testing Symposium (IOLTS'06), 2006, p.2 pp.

2006

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Volltext

Improving Reliability of SRAM-Based FPGAs by Inserting Redundant Routing

2005 8th European Conference on Radiation and Its Effects on Components and Systems, 2005, p.J6-1-J6-8

2005

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A self-checking scheme to mitigate single event upset effects in SRAM-based FPAAs

2008 European Conference on Radiation and Its Effects on Components and Systems, 2008, p.90-95

2008

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Register File Criticality and Compiler Optimization Effects on Embedded Microprocessor Reliability

S-SETA: Selective Software-Only Error-Detection Technique Using Assertions

Reliability Calculation With Respect to Functional Failures Induced by Radiation in TMR Arm Cortex-M0 Soft-Core Embedded Into SRAM-Based FPGA

Hybrid soft error mitigation techniques for COTS processor-based systems

Voltage Scaling Influence on the Soft Error Susceptibility of a FinFET-based Circuit

Register file criticality on embedded microprocessor reliability

Evaluating the effectiveness of a diversity TMR scheme under neutrons

Reducing TMR overhead by combining approximate circuit, transistor topology and input permutation approaches

Analyzing the Impact of Single-Event-Induced Charge Sharing in Complex Circuits

Using Bulk Built-in Current Sensors to Detect Soft Errors

A Self-Checking Scheme to Mitigate Single Event Upset Effects in SRAM-Based FPAAs

Improving Reliability of SRAM-Based FPGAs by Inserting Redundant Routing

Dependable Network-on-Chip Router Able to Simultaneously Tolerate Soft Errors and Crosstalk

Designing fault-tolerant techniques for SRAM-based FPGAs

Crosstalk- and SEU-Aware Networks on Chips

Evaluating large grain TMR and selective partial reconfiguration for soft error mitigation in SRAM-based FPGAs

Improving error detection capability of a SpaceWire router IP

Soft-Error Probability Due to SET in Clock Tree Networks

A broad strategy to detect crosstalk faults in network-on-chip interconnects

Constrained placement methodology for reducing SER under single-event-induced charge sharing effects

Evaluating SEU and crosstalk effects in network-on-chip routers

Improving Reliability of SRAM-Based FPGAs by Inserting Redundant Routing

A self-checking scheme to mitigate single event upset effects in SRAM-based FPAAs

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