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4H-SiC Step Trench Gate Power Metal-Oxide-Semiconductor Field-Effect Transistor
IEEE electron device letters, 2016-05, Vol.37 (5), p.633-635
2016
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Shield Gate Trench MOSFET With Narrow Gate Architecture and Low-k Dielectric Layer
IEEE electron device letters, 2020-05, Vol.41 (5), p.749-752
2020
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Modulation of Ciss of a 4H-SiC Planar MOSFET With a Shorter Sidewall and a Thicker Gate
IEEE electron device letters, 2023-11, Vol.44 (11), p.1825-1828
2023
Open Access
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Split-Gate 1.2-kV 4H-SiC MOSFET: Analysis and Experimental Validation
IEEE electron device letters, 2017-10, Vol.38 (10), p.1437-1440
2017
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Low ON-Resistance SiC Trench/Planar MOSFET With Reduced OFF-State Oxide Field and Low Gate Charges
IEEE electron device letters, 2016-11, Vol.37 (11), p.1458-1461
2016
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A New Fin p-Body Insulated Gate Bipolar Transistor With Low Miller Capacitance
IEEE electron device letters, 2015-06, Vol.36 (6), p.591-593
2015
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A Novel Trench-Gated Power MOSFET With Reduced Gate Charge
IEEE electron device letters, 2015-02, Vol.36 (2), p.165-167
2015
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BV > 3 kV/VTH = 3.5 V Normally-Off Al0.6Ga0.4N MOSFET With Recessed-Gate and Ferroelectric Gate Dielectric
IEEE electron device letters, 2022-12, Vol.43 (12), p.2141-2144
2022
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E-Mode GaN MIS-HEMT Using Ferroelectric Charge Trap Gate Stack With Low Dynamic On-Resistance and High Vth Stability by Field Plate Engineering
IEEE electron device letters, 2021-09, Vol.42 (9), p.1268-1271
2021
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Non-Volatile Flash Memory on Ge With an Oxidation-Induced Self-Assembled Charge Trapping Layer
IEEE electron device letters, 2022-06, Vol.43 (6), p.842-845
2022
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High-Performance Normally-OFF GaN MIS-HEMTs Using Hybrid Ferroelectric Charge Trap Gate Stack (FEG-HEMT) for Power Device Applications
IEEE electron device letters, 2018-07, Vol.39 (7), p.991-994
2018
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Study of Asymmetric Cell Structure Tilt Implanted 4H-SiC Trench MOSFET
IEEE electron device letters, 2019-05, Vol.40 (5), p.698-701
2019
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A Normally-Off GaN MIS-HEMT Fabricated Using Atomic Layer Etching to Improve Device Performance Uniformity for High Power Applications
IEEE electron device letters, 2022-10, Vol.43 (10), p.1629-1632
2022
Open Access
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Transistor-Less Logic Circuits Implemented With 2-D Charge Density Wave Devices
IEEE electron device letters, 2018-09, Vol.39 (9), p.1449-1452
2018
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A Steep-Slope Phenomenon by Gate Charge Pumping in a MOSFET
IEEE electron device letters, 2022-04, Vol.43 (4), p.521-524
2022
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A Split Gate Power FINFET With Improved ON-Resistance and Switching Performance
IEEE electron device letters, 2016-09, Vol.37 (9), p.1185-1188
2016
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Extraction of Interface Trap Density Through Synchronized Optical Charge Pumping in Gate-All-Around MOSFETs
IEEE electron device letters, 2020-11, Vol.41 (11), p.1629-1632
2020
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Improved Retention Time in Twin Gate 1T DRAM With Tunneling Based Read Mechanism
IEEE electron device letters, 2016-09, Vol.37 (9), p.1127-1130
2016
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Electroluminescence and Gate Carrier Dynamics in a Schottky-type p-GaN Gate Double-Channel GaN HEMT
IEEE electron device letters, 2023-10, Vol.44 (10), p.1-1
2023
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An Overturned Charge Injection Synaptic Transistor With a Floating-Gate for Neuromorphic Hardware Computing
IEEE electron device letters, 2022-09, Vol.43 (9), p.1440-1443
2022
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A Gate-All-Around In2O3 Nanoribbon FET with Near 20 mA/μm Drain Current
IEEE electron device letters, 2022-11, p.1-1
2022
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Threshold Voltage Stability Enhancing Technology for p-GaN HEMTs Using Hybrid Gate Structure
IEEE electron device letters, 2022-12, p.1-1
2022
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Hf₀.₅Zr₀.₅O₂ Ferroelectric Embedded Dual-Gate MoS₂ Field Effect Transistors for Memory Merged Logic Applications
IEEE electron device letters, 2020-10, Vol.41 (10), p.1600-1603
2020
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New Charge Pumping Current Model Assuming Exponential Tails in the Trap Energy Distribution
IEEE electron device letters, 2018-10, Vol.39 (10), p.1489-1492
2018
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Negative Capacitance Junctionless Device With Mid-Gap Work Function for Low Power Applications
IEEE electron device letters, 2020-03, Vol.41 (3), p.473-476
2020
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