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UNPU: An Energy-Efficient Deep Neural Network Accelerator With Fully Variable Weight Bit Precision

IEEE journal of solid-state circuits, 2019-01, Vol.54 (1), p.173-185

2019

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The Heterogeneous Deep Neural Network Processor With a Non-von Neumann Architecture

Proceedings of the IEEE, 2020-08, Vol.108 (8), p.1245-1260

2020

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On-Chip Training NPU - Algorithm, Architecture and SoC Design

1, 2023

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An EEG-NIRS Multimodal SoC for Accurate Anesthesia Depth Monitoring

IEEE journal of solid-state circuits, 2018-06, Vol.53 (6), p.1830-1843

2018

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HNPU: An Adaptive DNN Training Processor Utilizing Stochastic Dynamic Fixed-Point and Active Bit-Precision Searching

IEEE journal of solid-state circuits, 2021-09, Vol.56 (9), p.2858-2869

2021

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DF-LNPU: A Pipelined Direct Feedback Alignment-Based Deep Neural Network Learning Processor for Fast Online Learning

IEEE journal of solid-state circuits, 2021-05, Vol.56 (5), p.1630-1640

2021

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A Low-Power Deep Neural Network Online Learning Processor for Real-Time Object Tracking Application

IEEE transactions on circuits and systems. I, Regular papers, 2019-05, Vol.66 (5), p.1794-1804

2019

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Neuro-CIM: ADC-Less Neuromorphic Computing-in-Memory Processor With Operation Gating/Stopping and Digital-Analog Networks

IEEE journal of solid-state circuits, 2023-10, Vol.58 (10), p.1-15

2023

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A Low-Power Convolutional Neural Network Face Recognition Processor and a CIS Integrated With Always-on Face Detector

IEEE journal of solid-state circuits, 2018-01, Vol.53 (1), p.115-123

2018

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A Pipelined Point Cloud Based Neural Network Processor for 3-D Vision With Large-Scale Max Pooling Layer Prediction

IEEE journal of solid-state circuits, 2022-02, Vol.57 (2), p.661-670

2022

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SNPU: An Energy-Efficient Spike Domain Deep-Neural-Network Processor With Two-Step Spike Encoding and Shift-and-Accumulation Unit

IEEE journal of solid-state circuits, 2023-10, Vol.58 (10), p.1-14

2023

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MetaVRain: A Mobile Neural 3-D Rendering Processor With Bundle-Frame-Familiarity-Based NeRF Acceleration and Hybrid DNN Computing

IEEE journal of solid-state circuits, 2024-01, Vol.59 (1), p.1-14

2024

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An Efficient Deep-Learning-Based Super-Resolution Accelerating SoC With Heterogeneous Accelerating and Hierarchical Cache

IEEE journal of solid-state circuits, 2023-03, Vol.58 (3), p.614-623

2023

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An Overview of Computing-in-Memory Circuits With DRAM and NVM

IEEE transactions on circuits and systems. II, Express briefs, 2024-03, Vol.71 (3), p.1-1

2024

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A 8.81 TFLOPS/W Deep-Reinforcement-Learning Accelerator With Delta-Based Weight Sharing and Block-Mantissa Reconfigurable PE Array

IEEE transactions on circuits and systems. II, Express briefs, 2024-05, Vol.71 (5), p.2529-2533

2024

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The Signal Transmission Mechanism on the Surface of Human Body for Body Channel Communication

IEEE transactions on microwave theory and techniques, 2012-03, Vol.60 (3), p.582-593

2012

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Wireless Body-Area-Network Transceiver and Low-Power Receiver With High Application Expandability

IEEE journal of solid-state circuits, 2020-10, Vol.55 (10), p.2781-2789

2020

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A 82-nW Chaotic Map True Random Number Generator Based on a Sub-Ranging SAR ADC

IEEE journal of solid-state circuits, 2017-07, Vol.52 (7), p.1953-1965

2017

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A Wearable ECG Acquisition System With Compact Planar-Fashionable Circuit Board-Based Shirt

IEEE journal of biomedical and health informatics, 2009-11, Vol.13 (6), p.897-902

2009

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A Low-Power Graph Convolutional Network Processor With Sparse Grouping for 3D Point Cloud Semantic Segmentation in Mobile Devices

IEEE transactions on circuits and systems. I, Regular papers, 2022-04, Vol.69 (4), p.1507-1518

2022

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GANPU: An Energy-Efficient Multi-DNN Training Processor for GANs With Speculative Dual-Sparsity Exploitation

IEEE journal of solid-state circuits, 2021-09, Vol.56 (9), p.2845-2857

2021

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DT-CNN: An Energy-Efficient Dilated and Transposed Convolutional Neural Network Processor for Region of Interest Based Image Segmentation

IEEE transactions on circuits and systems. I, Regular papers, 2020-10, Vol.67 (10), p.3471-3483

2020

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A 9.6-mW/Ch 10-MHz Wide-Bandwidth Electrical Impedance Tomography IC With Accurate Phase Compensation for Early Breast Cancer Detection

IEEE journal of solid-state circuits, 2021-03, Vol.56 (3), p.887-898

2021

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Toward all-day wearable health monitoring: An ultralow-power, reflective organic pulse oximetry sensing patch

Science advances, 2018-11, Vol.4 (11), p.eaas9530-eaas9530

2018

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DynaPlasia: An eDRAM In-Memory Computing-Based Reconfigurable Spatial Accelerator With Triple-Mode Cell

IEEE journal of solid-state circuits, 2024-01, Vol.59 (1), p.102-115

2024

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UNPU: An Energy-Efficient Deep Neural Network Accelerator With Fully Variable Weight Bit Precision

The Heterogeneous Deep Neural Network Processor With a Non-von Neumann Architecture

On-Chip Training NPU - Algorithm, Architecture and SoC Design

An EEG-NIRS Multimodal SoC for Accurate Anesthesia Depth Monitoring

HNPU: An Adaptive DNN Training Processor Utilizing Stochastic Dynamic Fixed-Point and Active Bit-Precision Searching

DF-LNPU: A Pipelined Direct Feedback Alignment-Based Deep Neural Network Learning Processor for Fast Online Learning

A Low-Power Deep Neural Network Online Learning Processor for Real-Time Object Tracking Application

Neuro-CIM: ADC-Less Neuromorphic Computing-in-Memory Processor With Operation Gating/Stopping and Digital-Analog Networks

A Low-Power Convolutional Neural Network Face Recognition Processor and a CIS Integrated With Always-on Face Detector

A Pipelined Point Cloud Based Neural Network Processor for 3-D Vision With Large-Scale Max Pooling Layer Prediction

SNPU: An Energy-Efficient Spike Domain Deep-Neural-Network Processor With Two-Step Spike Encoding and Shift-and-Accumulation Unit

MetaVRain: A Mobile Neural 3-D Rendering Processor With Bundle-Frame-Familiarity-Based NeRF Acceleration and Hybrid DNN Computing

An Efficient Deep-Learning-Based Super-Resolution Accelerating SoC With Heterogeneous Accelerating and Hierarchical Cache

An Overview of Computing-in-Memory Circuits With DRAM and NVM

A 8.81 TFLOPS/W Deep-Reinforcement-Learning Accelerator With Delta-Based Weight Sharing and Block-Mantissa Reconfigurable PE Array

The Signal Transmission Mechanism on the Surface of Human Body for Body Channel Communication

Wireless Body-Area-Network Transceiver and Low-Power Receiver With High Application Expandability

A 82-nW Chaotic Map True Random Number Generator Based on a Sub-Ranging SAR ADC

A Wearable ECG Acquisition System With Compact Planar-Fashionable Circuit Board-Based Shirt

A Low-Power Graph Convolutional Network Processor With Sparse Grouping for 3D Point Cloud Semantic Segmentation in Mobile Devices

GANPU: An Energy-Efficient Multi-DNN Training Processor for GANs With Speculative Dual-Sparsity Exploitation

DT-CNN: An Energy-Efficient Dilated and Transposed Convolutional Neural Network Processor for Region of Interest Based Image Segmentation

A 9.6-mW/Ch 10-MHz Wide-Bandwidth Electrical Impedance Tomography IC With Accurate Phase Compensation for Early Breast Cancer Detection

Toward all-day wearable health monitoring: An ultralow-power, reflective organic pulse oximetry sensing patch

DynaPlasia: An eDRAM In-Memory Computing-Based Reconfigurable Spatial Accelerator With Triple-Mode Cell

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