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A wafer-scale 3-D circuit integration technology

IEEE transactions on electron devices, 2006-10, Vol.53 (10), p.2507-2516

2006

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Megapixel CMOS image sensor fabricated in three-dimensional integrated circuit technology

ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005, 2005, p.356-357 Vol. 1

2005

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X-band fully depleted SOI Amplifier with adaptive bias control

IEEE microwave and wireless components letters, 2005-07, Vol.15 (7), p.451-453

2005

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High-performance fully-depleted SOI RF CMOS

IEEE electron device letters, 2002-01, Vol.23 (1), p.52-54

2002

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Vertically stacked RF switches by wafer-scale three-dimensional integration

Electronics letters, 2012-05, Vol.48 (10), p.597-598

2012

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Wafer-scale 3D integration of InGaAs photodiode arrays with Si readout circuits by oxide bonding and through-oxide vias

Microelectronic engineering, 2011, Vol.88 (1), p.131-134

2011

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Three-dimensional integration of silicon-on-insulator RF amplifier

Electronics letters, 2008, Vol.44 (12), p.746-747

2008

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Channel engineering of SOI MOSFETs for RF applications

2009 IEEE International SOI Conference, 2009, p.1-2

2009

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Scaling Three-Dimensional SOI Integrated-Circuit Technology

2007 IEEE International SOI Conference, 2007, p.87-88

2007

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Thermal Effects of Three Dimensional Integrated Circuit Stacks

2007 IEEE International SOI Conference, 2007, p.91-92

2007

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Deep-Trench Process Technology for Three-Dimensionally Integrated SOI-Based Image Sensors

2007 IEEE International SOI Conference, 2007, p.97-98

2007

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Characterization of a three-dimensional SOI integrated-circuit technology

2008 IEEE International SOI Conference, 2008, p.109-110

2008

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Fully Depleted SOI RF Switch with Dynamic Biasing

2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2007, p.175-178

2007

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High-frequency characterization of sub-0.25-μm fully depleted silicon-on-insulator MOSFETs

IEEE electron device letters, 2000-10, Vol.21 (10), p.497-499

2000

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High-frequency characterization of sub-0.25-/spl mu/m fully depleted silicon-on-insulator MOSFETs

IEEE electron device letters, 2000-10, Vol.21 (10), p.497-499

2000

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High-frequency characterization of sub-0.25-[micro]m fully depleted silicon-on-insulator MOSFETs

IEEE electron device letters, 2000-10, Vol.21 (10), p.497

2000

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3D via etch development for 3D circuit integration in FDSOI

2005 IEEE International SOI Conference Proceedings, 2005, p.104-105

2005

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A new three-terminal switching device

IEEE electron device letters, 1995-03, Vol.16 (3), p.115-117

1995

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Wafer-scale 3D integration of InGaAs image sensors with Si readout circuits

2009 IEEE International Conference on 3D System Integration, 2009, p.1-4

2009

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Wafer-Scale 3D Integration of Silicon-on-Insulator RF Amplifiers

2009 IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, 2009, p.1-4

2009

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Performance of a low power fully-depleted deep submicron SOI technology and its extension to 0.15 /spl mu/m

1996 IEEE International SOI Conference Proceedings, 1996, p.102-103

1996

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Effects of Through-BOX Vias on SOI MOSFETs

2008 International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA), 2008, p.95-96

2008

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Impact of gate resistance on RF performance of fully depleted SOI MOSFET

Digest of Papers. 2006 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, 2006, p.4 pp.

2006

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Standardized next-generation sequencing of immunoglobulin and T-cell receptor gene recombinations for MRD marker identification in acute lymphoblastic leukaemia; a EuroClonality-NGS validation study

Leukemia, 2019-09, Vol.33 (9), p.2241-2253

2019

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Equilibrium, flow shear and stability measurements in the Z-pinch

Nuclear fusion, 2009-07, Vol.49 (7), p.75039

2009

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A wafer-scale 3-D circuit integration technology

Megapixel CMOS image sensor fabricated in three-dimensional integrated circuit technology

X-band fully depleted SOI Amplifier with adaptive bias control

High-performance fully-depleted SOI RF CMOS

Vertically stacked RF switches by wafer-scale three-dimensional integration

Wafer-scale 3D integration of InGaAs photodiode arrays with Si readout circuits by oxide bonding and through-oxide vias

Three-dimensional integration of silicon-on-insulator RF amplifier

Channel engineering of SOI MOSFETs for RF applications

Scaling Three-Dimensional SOI Integrated-Circuit Technology

Thermal Effects of Three Dimensional Integrated Circuit Stacks

Deep-Trench Process Technology for Three-Dimensionally Integrated SOI-Based Image Sensors

Characterization of a three-dimensional SOI integrated-circuit technology

Fully Depleted SOI RF Switch with Dynamic Biasing

High-frequency characterization of sub-0.25-μm fully depleted silicon-on-insulator MOSFETs

High-frequency characterization of sub-0.25-/spl mu/m fully depleted silicon-on-insulator MOSFETs

High-frequency characterization of sub-0.25-[micro]m fully depleted silicon-on-insulator MOSFETs

3D via etch development for 3D circuit integration in FDSOI

A new three-terminal switching device

Wafer-scale 3D integration of InGaAs image sensors with Si readout circuits

Wafer-Scale 3D Integration of Silicon-on-Insulator RF Amplifiers

Performance of a low power fully-depleted deep submicron SOI technology and its extension to 0.15 /spl mu/m

Effects of Through-BOX Vias on SOI MOSFETs

Impact of gate resistance on RF performance of fully depleted SOI MOSFET

Standardized next-generation sequencing of immunoglobulin and T-cell receptor gene recombinations for MRD marker identification in acute lymphoblastic leukaemia; a EuroClonality-NGS validation study

Equilibrium, flow shear and stability measurements in the Z-pinch

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