UB Paderborn / Katalog / Suche / in CDI

FMER: An Energy-Efficient Error Recovery Methodology for SRAM-Based FPGA Designs

IEEE transactions on aerospace and electronic systems, 2018-12, Vol.54 (6), p.2695-2712

2018

Link zum Volltext
Volltext

Efficient Fine-grained Processor-logic Interactions on the Cache-coherent Zynq Platform

ACM transactions on reconfigurable technology and systems, 2019-01, Vol.11 (4), p.1-22

2019

Link zum Volltext

Verfügbarkeit prüfen

Service-Oriented Architecture on FPGA-Based MPSoC

IEEE transactions on parallel and distributed systems, 2017-10, Vol.28 (10), p.2993-3006

2017

Link zum Volltext
Volltext

Fault Recovery Time Analysis for Coarse-Grained Reconfigurable Architectures

ACM transactions on embedded computing systems, 2018-04, Vol.17 (2), p.1-21

2018

Link zum Volltext

Verfügbarkeit prüfen

Simulation-based functional verification of dynamically reconfigurable systems

ACM transactions on embedded computing systems, 2014-12, Vol.13 (4), p.1-23

2014

Link zum Volltext

Verfügbarkeit prüfen

Opportunities and challenges for dynamic FPGA reconfiguration in electronic measurement and instrumentation

2013 IEEE 11th International Conference on Electronic Measurement & Instruments, 2013, Vol.1, p.258-263

Diessel, Oliver

2013

Link zum Volltext
Volltext

Scheduling configuration memory error checks to improve the reliability of FPGA-based systems

IET computers & digital techniques, 2019-05, Vol.13 (3), p.154-165

2019

Link zum Volltext

Verfügbarkeit prüfen

Reconfiguration Control Networks for FPGA-based TMR systems with modular error recovery

Microprocessors and microsystems, 2018-07, Vol.60, p.86-95

2018

Link zum Volltext

Verfügbarkeit prüfen

Leveraging FPGA Runtime Reconfigurability to Implement Multi-Hash-Chain Proof-of-Work

2022 IEEE 30th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), 2022, p.1-5

2022

Link zum Volltext
Volltext

On the Single Event Upset Vulnerability and Mitigation of Binarized Neural Networks on FPGAs

2022 IEEE 30th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), 2022, p.1-1

2022

Link zum Volltext
Volltext

Fine-Grained Module-Based Error Recovery in FPGA-Based TMR Systems

ACM transactions on reconfigurable technology and systems, 2018-03, Vol.11 (1), p.1-23

2018

Link zum Volltext

Verfügbarkeit prüfen

Guest Editorial: Field-Programmable Technology

Journal of signal processing systems, 2012-04, Vol.67 (1), p.1-2

2012

Link zum Volltext

Verfügbarkeit prüfen

Configuration Merging in Point-to-Point Networks for Module-Based FPGA Reconfiguration

ACM transactions on reconfigurable technology and systems, 2010-01, Vol.3 (1), p.1-36

2010

Link zum Volltext

Verfügbarkeit prüfen

Improving Fmax of FPGA circuits employing DPR to recover from configuration memory upsets

2015 IEEE International Symposium on Circuits and Systems (ISCAS), 2015, p.1190-1193

2015

Link zum Volltext
Volltext

Reconfiguration network design for SEU recovery in FPGAs

2014 IEEE International Symposium on Circuits and Systems (ISCAS), 2014, p.1524-1527

2014

Link zum Volltext
Volltext

Optimization of placement of dynamic network-on-chip cores using simulated annealing

IECON 2011 - 37th Annual Conference of the IEEE Industrial Electronics Society, 2011, p.2400-2405

2011

Link zum Volltext
Volltext

A Short-Transfer Model for Tightly-Coupled CPU-FPGA Platforms

2018 International Conference on Field-Programmable Technology (FPT), 2018, p.366-369

2018

Link zum Volltext

Verfügbarkeit prüfen

Introduction to RAW 2019

2019 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), 2019, p.69-69

2019

Link zum Volltext
Volltext

A programmable multi-GNSS baseband receiver

2015 IEEE International Symposium on Circuits and Systems (ISCAS), 2015, p.1178-1181

2015

Link zum Volltext
Volltext

The First 25 Years of the FPL Conference: Significant Papers

ACM transactions on reconfigurable technology and systems, 2017-06, Vol.10 (2), p.1-17

2017

Link zum Volltext

Verfügbarkeit prüfen

Functional Unit Chaining: A Runtime Adaptive Architecture for Reducing Bypass Delays

Advances in Computer Systems Architecture, 2006, p.161-174

2006

Link zum Volltext

Verfügbarkeit prüfen

A Configuration System Architecture Supporting Bit-Stream Compression for FPGAs

Advances in Computer Systems Architecture, 2005, p.415-428

2005

Link zum Volltext

Verfügbarkeit prüfen

FMER: A hybrid configuration memory error recovery scheme for highly reliable FPGA SoCs

2016 26th International Conference on Field Programmable Logic and Applications (FPL), 2016, p.1-4

2016

Link zum Volltext
Volltext

From C to Fault-Tolerant FPGA-Based Systems

2018 IEEE 26th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), 2018, p.212-212

2018

Link zum Volltext
Volltext

Chip-Based Reconfigurable Task Management

Field-Programmable Logic and Applications, 2001, p.182-191

2001

Link zum Volltext

Verfügbarkeit prüfen

Menü

Weitere Dienste

Einstellungen

FMER: An Energy-Efficient Error Recovery Methodology for SRAM-Based FPGA Designs

Efficient Fine-grained Processor-logic Interactions on the Cache-coherent Zynq Platform

Service-Oriented Architecture on FPGA-Based MPSoC

Fault Recovery Time Analysis for Coarse-Grained Reconfigurable Architectures

Simulation-based functional verification of dynamically reconfigurable systems

Opportunities and challenges for dynamic FPGA reconfiguration in electronic measurement and instrumentation

Scheduling configuration memory error checks to improve the reliability of FPGA-based systems

Reconfiguration Control Networks for FPGA-based TMR systems with modular error recovery

Leveraging FPGA Runtime Reconfigurability to Implement Multi-Hash-Chain Proof-of-Work

On the Single Event Upset Vulnerability and Mitigation of Binarized Neural Networks on FPGAs

Fine-Grained Module-Based Error Recovery in FPGA-Based TMR Systems

Guest Editorial: Field-Programmable Technology

Configuration Merging in Point-to-Point Networks for Module-Based FPGA Reconfiguration

Improving Fmax of FPGA circuits employing DPR to recover from configuration memory upsets

Reconfiguration network design for SEU recovery in FPGAs

Optimization of placement of dynamic network-on-chip cores using simulated annealing

A Short-Transfer Model for Tightly-Coupled CPU-FPGA Platforms

Introduction to RAW 2019

A programmable multi-GNSS baseband receiver

The First 25 Years of the FPL Conference: Significant Papers

Functional Unit Chaining: A Runtime Adaptive Architecture for Reducing Bypass Delays

A Configuration System Architecture Supporting Bit-Stream Compression for FPGAs

FMER: A hybrid configuration memory error recovery scheme for highly reliable FPGA SoCs

From C to Fault-Tolerant FPGA-Based Systems

Chip-Based Reconfigurable Task Management

Suchergebnisse filtern