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Robust Online Tensor Completion for IoT Streaming Data Recovery

IEEE transaction on neural networks and learning systems, 2023-12, Vol.34 (12), p.10178-10192

2023

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PMU Missing Data Recovery Using Tensor Decomposition

IEEE transactions on power systems, 2020-11, Vol.35 (6), p.4554-4563

2020

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A 0.14-to-0.29-pJ/bit 14-GBaud/s Trimodal (NRZ/PAM-4/PAM-8) Half-Rate Bang-Bang Clock and Data Recovery (BBCDR) Circuit in 28-nm CMOS

IEEE transactions on circuits and systems. I, Regular papers, 2021-01, Vol.68 (1), p.89-102

2021

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Accurate Recovery of Internet Traffic Data: A Sequential Tensor Completion Approach

IEEE/ACM transactions on networking, 2018-04, Vol.26 (2), p.793-806

2018

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A 4-20-Gb/s 1.87-pJ/b Continuous-Rate Digital CDR Circuit With Unlimited Frequency Acquisition Capability in 65-nm CMOS

IEEE journal of solid-state circuits, 2021-05, Vol.56 (5), p.1597-1607

2021

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A 12-Gb/s 10-ns Turn-On Time Rapid ON/OFF Baud-Rate DFE Receiver in 65-nm CMOS

IEEE journal of solid-state circuits, 2020-08, Vol.55 (8), p.2196-2205

2020

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Flow-Controlled and Clock-Distributed Optical Switch and Control System

IEEE transactions on communications, 2022-05, Vol.70 (5), p.3310-3319

2022

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A 6.5-12.5-Gb/s Half-Rate Single-Loop All-Digital Referenceless CDR in 28-nm CMOS

IEEE journal of solid-state circuits, 2020-10, Vol.55 (10), p.2831-2841

2020

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A 56-Gb/s 50-mW NRZ Receiver in 28-nm CMOS

IEEE journal of solid-state circuits, 2022-01, Vol.57 (1), p.54-67

2022

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Modeling the Performance of the Clock Phase Caching Approach to Clock and Data Recovery

Journal of lightwave technology, 2022-03, Vol.40 (6), p.1681-1689

2022

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A Flexible and Robust Tensor Completion Approach for Traffic Data Recovery With Low-Rankness

IEEE transactions on intelligent transportation systems, 2024-03, Vol.25 (3), p.2558-2572

2024

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A 0.2-7.1 Gb/s Low-Jitter Full-Rate Reference-less CDR for Communication Signal Analyzers

IEEE transactions on instrumentation and measurement, 2023-01, Vol.72, p.1-1

2023

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Robust Corrupted Data Recovery and Clustering via Generalized Transformed Tensor Low-Rank Representation

IEEE transaction on neural networks and learning systems, 2024-07, Vol.35 (7), p.8839-8853

2024

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A 10-Gb/s Wireline Receiver Using Linear Baud-Rate CDR and Analog Equalizer for Free Space Optical Communication Over 10- and 100-m Distances

IEEE journal of solid-state circuits, 2024-06, Vol.59 (6), p.1835-1846

2024

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Design Techniques for 48-Gb/s 2.4-pJ/b PAM-4 Baud-Rate CDR With Stochastic Phase Detector

IEEE journal of solid-state circuits, 2022-10, Vol.57 (10), p.3014-3024

2022

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An Alternating Direction Method of Multipliers Based Approach for PMU Data Recovery

IEEE transactions on smart grid, 2019-07, Vol.10 (4), p.4554-4565

2019

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Low Thermal Sensitivity Hollow Core Fiber for Optically-Switched Data Centers

Journal of lightwave technology, 2020-05, Vol.38 (9), p.2703-2709

2020

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Bayesian High-Rank Hankel Matrix Completion for Nonlinear Synchrophasor Data Recovery

IEEE transactions on power systems, 2024-01, Vol.39 (1), p.1-19

2024

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A Nonlocal Similarity Learning-Based Tensor Completion Model With Its Application in Intelligent Transportation System

IEEE transactions on intelligent transportation systems, 2024-03, Vol.25 (3), p.3140-3151

2024

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Fractionally-Spaced Equalizers as Clock and Data Recovery Loops

IEEE transactions on circuits and systems. I, Regular papers, 2024-07, Vol.71 (7), p.3002-3015

2024

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Let's Talk About Storage & Recovery Methods for Non-Volatile Memory Database Systems

Proceedings of the 2015 ACM SIGMOD International Conference on Management of Data, 2015, p.707-722

2015

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A 60-Gb/s 1.2-pJ/bit 1/4-Rate PAM-4 Receiver With a Jitter Compensation CDR

IEEE journal of solid-state circuits, 2024-02, Vol.59 (2), p.1-15

2024

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Design Techniques for a 6.4-32-Gb/s 0.96-pJ/b Continuous-Rate CDR With Stochastic Frequency-Phase Detector

IEEE journal of solid-state circuits, 2022-02, Vol.57 (2), p.573-585

2022

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A Model-Agnostic Method for PMU Data Recovery Using Optimal Singular Value Thresholding

IEEE transactions on power delivery, 2022-08, Vol.37 (4), p.3302-3312

2022

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A 103 fJ/b/dB, 10-26 Gb/s Receiver With a Dual Feedback Nested Loop CDR for Wide Bandwidth Jitter Tolerance Enhancement

IEEE journal of solid-state circuits, 2023-10, Vol.58 (10), p.1-11

2023

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Robust Online Tensor Completion for IoT Streaming Data Recovery

PMU Missing Data Recovery Using Tensor Decomposition

A 0.14-to-0.29-pJ/bit 14-GBaud/s Trimodal (NRZ/PAM-4/PAM-8) Half-Rate Bang-Bang Clock and Data Recovery (BBCDR) Circuit in 28-nm CMOS

Accurate Recovery of Internet Traffic Data: A Sequential Tensor Completion Approach

A 4-20-Gb/s 1.87-pJ/b Continuous-Rate Digital CDR Circuit With Unlimited Frequency Acquisition Capability in 65-nm CMOS

A 12-Gb/s 10-ns Turn-On Time Rapid ON/OFF Baud-Rate DFE Receiver in 65-nm CMOS

Flow-Controlled and Clock-Distributed Optical Switch and Control System

A 6.5-12.5-Gb/s Half-Rate Single-Loop All-Digital Referenceless CDR in 28-nm CMOS

A 56-Gb/s 50-mW NRZ Receiver in 28-nm CMOS

Modeling the Performance of the Clock Phase Caching Approach to Clock and Data Recovery

A Flexible and Robust Tensor Completion Approach for Traffic Data Recovery With Low-Rankness

A 0.2-7.1 Gb/s Low-Jitter Full-Rate Reference-less CDR for Communication Signal Analyzers

Robust Corrupted Data Recovery and Clustering via Generalized Transformed Tensor Low-Rank Representation

A 10-Gb/s Wireline Receiver Using Linear Baud-Rate CDR and Analog Equalizer for Free Space Optical Communication Over 10- and 100-m Distances

Design Techniques for 48-Gb/s 2.4-pJ/b PAM-4 Baud-Rate CDR With Stochastic Phase Detector

An Alternating Direction Method of Multipliers Based Approach for PMU Data Recovery

Low Thermal Sensitivity Hollow Core Fiber for Optically-Switched Data Centers

Bayesian High-Rank Hankel Matrix Completion for Nonlinear Synchrophasor Data Recovery

A Nonlocal Similarity Learning-Based Tensor Completion Model With Its Application in Intelligent Transportation System

Fractionally-Spaced Equalizers as Clock and Data Recovery Loops

Let's Talk About Storage & Recovery Methods for Non-Volatile Memory Database Systems

A 60-Gb/s 1.2-pJ/bit 1/4-Rate PAM-4 Receiver With a Jitter Compensation CDR

Design Techniques for a 6.4-32-Gb/s 0.96-pJ/b Continuous-Rate CDR With Stochastic Frequency-Phase Detector

A Model-Agnostic Method for PMU Data Recovery Using Optimal Singular Value Thresholding

A 103 fJ/b/dB, 10-26 Gb/s Receiver With a Dual Feedback Nested Loop CDR for Wide Bandwidth Jitter Tolerance Enhancement

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