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Vertically stacked RF switches by wafer-scale three-dimensional integration

Electronics letters, 2012-05, Vol.48 (10), p.597-598

2012

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Solid-state qubits integrated with superconducting through-silicon vias

npj quantum information, 2020-07, Vol.6 (1), Article 59

2020

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Characterization of superconducting through-silicon vias as capacitive elements in quantum circuits

Applied physics letters, 2023-10, Vol.123 (15)

2023

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Improvement of SOI MOSFET RF Performance by Implant Optimization

IEEE microwave and wireless components letters, 2010-05, Vol.20 (5), p.271-273

2010

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Wafer-scale 3D integration of InGaAs photodiode arrays with Si readout circuits by oxide bonding and through-oxide vias

Microelectronic engineering, 2011, Vol.88 (1), p.131-134

2011

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Three-dimensional integration of silicon-on-insulator RF amplifier

Electronics letters, 2008, Vol.44 (12), p.746-747

2008

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X-band fully depleted SOI Amplifier with adaptive bias control

IEEE microwave and wireless components letters, 2005-07, Vol.15 (7), p.451-453

2005

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High-performance fully-depleted SOI RF CMOS

IEEE electron device letters, 2002-01, Vol.23 (1), p.52-54

2002

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Fully Depleted SOI RF Switch with Dynamic Biasing

2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2007, p.175-178

2007

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High-frequency characterization of sub-0.25-μm fully depleted silicon-on-insulator MOSFETs

IEEE electron device letters, 2000-10, Vol.21 (10), p.497-499

2000

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SOI-enabled three-dimensional integrated-circuit technology

2010 IEEE International SOI Conference (SOI), 2010, p.1-2

2010

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Fabrication of self-aligned 90-nm fully depleted SOI CMOS SLOTFETs

IEEE electron device letters, 2001-07, Vol.22 (7), p.345-347

2001

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Channel engineering of SOI MOSFETs for RF applications

2009 IEEE International SOI Conference, 2009, p.1-2

2009

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Radiation effects in MIT Lincoln lab 3DIC technology

2009 IEEE International SOI Conference, 2009, p.1-2

2009

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Thermal Effects of Three Dimensional Integrated Circuit Stacks

2007 IEEE International SOI Conference, 2007, p.91-92

2007

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Deep-Trench Process Technology for Three-Dimensionally Integrated SOI-Based Image Sensors

2007 IEEE International SOI Conference, 2007, p.97-98

2007

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A wafer-scale 3-D circuit integration technology

IEEE transactions on electron devices, 2006-10, Vol.53 (10), p.2507-2516

2006

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Vertically stacked RF switches by wafer-scale three-dimensional integration

Electronics letters, 2012-05, Vol.48 (10), p.1-1

2012

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Experience-driven leader development: Models, tools, best practices, and advice for on-the-job development

3, 2013

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Impact of gate resistance on RF performance of fully depleted SOI MOSFET

Digest of Papers. 2006 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, 2006, p.4 pp.

2006

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Floating body effects on the RF performance of FDSOI RF amplifiers

2005 IEEE International SOI Conference Proceedings, 2005, p.44-46

2005

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Wafer-scale 3D integration of InGaAs image sensors with Si readout circuits

2009 IEEE International Conference on 3D System Integration, 2009, p.1-4

2009

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3D-enabled heterogeneous integrated circuits

2013 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), 2013, p.1-29

2013

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Wafer-Scale 3D Integration of Silicon-on-Insulator RF Amplifiers

2009 IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, 2009, p.1-4

2009

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DC and RF characterization of fully depleted strained SOI MOSFETs

2004 IEEE International SOI Conference (IEEE Cat. No.04CH37573), 2004, p.86-88

2004

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Vertically stacked RF switches by wafer-scale three-dimensional integration

Solid-state qubits integrated with superconducting through-silicon vias

Characterization of superconducting through-silicon vias as capacitive elements in quantum circuits

Improvement of SOI MOSFET RF Performance by Implant Optimization

Wafer-scale 3D integration of InGaAs photodiode arrays with Si readout circuits by oxide bonding and through-oxide vias

Three-dimensional integration of silicon-on-insulator RF amplifier

X-band fully depleted SOI Amplifier with adaptive bias control

High-performance fully-depleted SOI RF CMOS

Fully Depleted SOI RF Switch with Dynamic Biasing

High-frequency characterization of sub-0.25-μm fully depleted silicon-on-insulator MOSFETs

SOI-enabled three-dimensional integrated-circuit technology

Fabrication of self-aligned 90-nm fully depleted SOI CMOS SLOTFETs

Channel engineering of SOI MOSFETs for RF applications

Radiation effects in MIT Lincoln lab 3DIC technology

Thermal Effects of Three Dimensional Integrated Circuit Stacks

Deep-Trench Process Technology for Three-Dimensionally Integrated SOI-Based Image Sensors

A wafer-scale 3-D circuit integration technology

Vertically stacked RF switches by wafer-scale three-dimensional integration

Experience-driven leader development: Models, tools, best practices, and advice for on-the-job development

Impact of gate resistance on RF performance of fully depleted SOI MOSFET

Floating body effects on the RF performance of FDSOI RF amplifiers

Wafer-scale 3D integration of InGaAs image sensors with Si readout circuits

3D-enabled heterogeneous integrated circuits

Wafer-Scale 3D Integration of Silicon-on-Insulator RF Amplifiers

DC and RF characterization of fully depleted strained SOI MOSFETs

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