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A 4.6-μm, 127-dB Dynamic Range, Ultra-Low Power Stacked Digital Pixel Sensor With Overlapped Triple Quantization

IEEE transactions on electron devices, 2022-06, Vol.69 (6), p.2943-2950

2022

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A Review of 3-Dimensional Wafer Level Stacked Backside Illuminated CMOS Image Sensor Process Technologies

IEEE transactions on electron devices, 2022-06, Vol.69 (6), p.2766-2778

2022

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A 4.0 μm Stacked Digital Pixel Sensor Operating in a Dual Quantization Mode for High Dynamic Range

IEEE transactions on electron devices, 2022-06, Vol.69 (6), p.2957-2964

2022

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Extraction and Estimation of Pinned Photodiode Capacitance in CMOS Image Sensors

IEEE journal of the Electron Devices Society, 2014-07, Vol.2 (4), p.59-64

2014

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A 3.96μm, 124dB Dynamic Range, 6.2mW Stacked Digital Pixel Sensor with Monochrome and Near-Infrared Dual-Channel Global Shutter Capture

2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023, p.1-2

2023

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Nonsilicide source/drain pixel for 0.25-μm CMOS image sensor

IEEE electron device letters, 2001-02, Vol.22 (2), p.71-73

2001

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A new and improved borderless contact (BLC) structure for high-performance Ti-salicide in sub-quarter micron CMOS devices

IEEE electron device letters, 2000-07, Vol.21 (7), p.344-346

2000

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A novel double ion-implant (DII) Ti-salicide technology for high-performance sub-0.25-μm CMOS devices applications

IEEE transactions on electron devices, 2001-08, Vol.48 (8), p.1740-1742

2001

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A Comparison of Behaviors between Hydrogenated/Unhydrogenated Polysilicon Thin Film Transistors under Electric Stress

Japanese Journal of Applied Physics, 2000-07, Vol.39 (7R), p.3896

2000

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On the high-performance Ti-salicide ULSI CMOS devices prepared by a borderless contact technique and double-implant structure

Semiconductor science and technology, 2002-03, Vol.17 (3), p.205-210

2002

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Thin nitride-capped poly-resistor for high density and high performance SRAM with self-aligned-contact

Electronics letters, 1999-11, Vol.35 (24), p.2148-2149

1999

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A peripheral switchable 3D stacked CMOS image sensor

2014 Symposium on VLSI Circuits Digest of Technical Papers, 2014, p.1-2

2014

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Rapid thermal annealing on the characteristics of polysilicon thin-film transistors in practical TFT SRAM process

IEEE transactions on electron devices, 1997-09, Vol.44 (9), p.1561-1562

1997

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The impacts of back-end high temperature thermal treatments on the characteristics and gate oxide reliability of thin film transistor in ultra large scale integrated circuit process

Japanese Journal of Applied Physics, 1997-05, Vol.36 (5A), p.2628-2632

1997

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High performance 0.25-um CMOS color imager technology with non-silicide source/drain pixel

International Electron Devices Meeting 2000. Technical Digest. IEDM (Cat. No.00CH37138), 2000, p.705-708

2000

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Nonsilicide source/drain pixel for 0.25-[micro]m CMOS image sensor

IEEE electron device letters, 2001-02, Vol.22 (2), p.71

2001

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Nonsilicide source/drain pixel for 0.25-/spl mu/m CMOS image sensor

IEEE electron device letters, 2001-02, Vol.22 (2), p.71-73

2001

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A novel double ion-implant (DII) Ti-salicide technology for high-performance sub-0.25-/spl mu/m CMOS devices applications

IEEE transactions on electron devices, 2001-08, Vol.48 (8), p.1740-1742

2001

Volltextzugriff (PDF)

A novel double ion-implant (DII) Ti-salicide technology for high-performance sub-0.25-[mu]m CMOS devices applications

IEEE transactions on electron devices, 2001-08, Vol.48 (8), p.1740

2001

Volltextzugriff (PDF)

A novel double ion-implant (DII) Ti-salicide technology for high-performance sub-0.25-mum CMOS devices applications

IEEE transactions on electron devices, 2001-08, Vol.48 (8), p.1740-1742

2001

Volltextzugriff (PDF)

Identification of diffusing species during metal silicide oxidation by Rutherford backscattering spectrometry

Nuclear instruments & methods in physics research. Section B, Beam interactions with materials and atoms, 1986-04, Vol.15 (1), p.280-284

1986

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A high performance active pixel sensor with 0.18um CMOS color imager technology

International Electron Devices Meeting. Technical Digest (Cat. No.01CH37224), 2001, p.24.3.1-24.3.4

2001

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Crosstalk improvement technology applicable to 0.14um cmos image sensor

2004

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Crosstalk improvement technology applicable to 0.14/spl mu/m CMOS image sensor

IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004, 2004, p.997-1000

2004

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Active pixel image sensor scale down in 0.18 /spl mu/m CMOS technology

Digest. International Electron Devices Meeting, 2002, p.813-816

2002

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A 4.6-μm, 127-dB Dynamic Range, Ultra-Low Power Stacked Digital Pixel Sensor With Overlapped Triple Quantization

A Review of 3-Dimensional Wafer Level Stacked Backside Illuminated CMOS Image Sensor Process Technologies

A 4.0 μm Stacked Digital Pixel Sensor Operating in a Dual Quantization Mode for High Dynamic Range

Extraction and Estimation of Pinned Photodiode Capacitance in CMOS Image Sensors

A 3.96μm, 124dB Dynamic Range, 6.2mW Stacked Digital Pixel Sensor with Monochrome and Near-Infrared Dual-Channel Global Shutter Capture

Nonsilicide source/drain pixel for 0.25-μm CMOS image sensor

A new and improved borderless contact (BLC) structure for high-performance Ti-salicide in sub-quarter micron CMOS devices

A novel double ion-implant (DII) Ti-salicide technology for high-performance sub-0.25-μm CMOS devices applications

A Comparison of Behaviors between Hydrogenated/Unhydrogenated Polysilicon Thin Film Transistors under Electric Stress

On the high-performance Ti-salicide ULSI CMOS devices prepared by a borderless contact technique and double-implant structure

Thin nitride-capped poly-resistor for high density and high performance SRAM with self-aligned-contact

A peripheral switchable 3D stacked CMOS image sensor

Rapid thermal annealing on the characteristics of polysilicon thin-film transistors in practical TFT SRAM process

The impacts of back-end high temperature thermal treatments on the characteristics and gate oxide reliability of thin film transistor in ultra large scale integrated circuit process

High performance 0.25-um CMOS color imager technology with non-silicide source/drain pixel

Nonsilicide source/drain pixel for 0.25-[micro]m CMOS image sensor

Nonsilicide source/drain pixel for 0.25-/spl mu/m CMOS image sensor

A novel double ion-implant (DII) Ti-salicide technology for high-performance sub-0.25-/spl mu/m CMOS devices applications

A novel double ion-implant (DII) Ti-salicide technology for high-performance sub-0.25-[mu]m CMOS devices applications

A novel double ion-implant (DII) Ti-salicide technology for high-performance sub-0.25-mum CMOS devices applications

Identification of diffusing species during metal silicide oxidation by Rutherford backscattering spectrometry

A high performance active pixel sensor with 0.18um CMOS color imager technology

Crosstalk improvement technology applicable to 0.14um cmos image sensor

Crosstalk improvement technology applicable to 0.14/spl mu/m CMOS image sensor

Active pixel image sensor scale down in 0.18 /spl mu/m CMOS technology

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