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Impact of La–OH bonds on the retention of Co/LaSiO CBRAM

Applied physics letters, 2020-10, Vol.117 (15)

2020

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The VO2 interface, the metal-insulator transition tunnel junction, and the metal-insulator transition switch On-Off resistance

Journal of applied physics, 2012-12, Vol.112 (12)

2012

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Direct observation of both contact and remote oxygen scavenging of GeO2 in a metal-oxide-semiconductor stack

Journal of applied physics, 2014-10, Vol.116 (16)

2014

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Chemisorption of ALD precursors in and on porous low-k films

Microelectronic engineering, 2013-06, Vol.106, p.81-84

2013

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An InGaAs/InP quantum well finfet using the replacement fin process integrated in an RMG flow on 300mm Si substrates

2014 Symposium on VLSI Technology (VLSI-Technology): Digest of Technical Papers, 2014, p.1-2

2014

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IEEE_Xplore

First demonstration of monocrystalline silicon macaroni channel for 3-D NAND memory devices

2018 IEEE Symposium on VLSI Technology, 2018, p.203-204

2018

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IEEE_Xplore

Band alignment of Hf―Zr oxides on Al2O3/GeO2/Ge stacks

Microelectronic engineering, 2011-07, Vol.88 (7), p.1557-1559

2011

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Atomic-layer-deposited tantalum silicate as a gate dielectric for III–V MOS devices

Microelectronic engineering, 2011-07, Vol.88 (7), p.1098-1100

2011

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Si cap passivation for Ge nMOS applications

Microelectronic engineering, 2013-09, Vol.109, p.46-49

2013

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Atomic layer deposition of Al2O3 on S-passivated Ge

Microelectronic engineering, 2011-07, Vol.88 (7), p.1553-1556

2011

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Scalability of InGaAs gate-all-around FET integrated on 300mm Si platform: Demonstration of channel width down to 7nm and Lg down to 36nm

2016 IEEE Symposium on VLSI Technology, 2016, p.1-2

2016

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Understanding the potential and limitations of HfAlO as interpoly dielectric in floating-gate Flash memory

Microelectronic engineering, 2009-07, Vol.86 (7), p.1807-1811

2009

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Effect of the switching layer on CBRAM reliability and benchmarking against OxRAM devices

Solid-state electronics, 2021-10, Vol.184, p.108058, Article 108058

2021

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Electrical Properties of Low-VT Metal-Gated n-MOSFETs Using La2O3/SiOx as Interfacial Layer Between HfLaO High-κ Dielectrics and Si Channel

IEEE electron device letters, 2008-05, Vol.29 (5), p.430-433

2008

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High-K incorporated in a SiON tunnel layer for 3D NAND programming voltage reduction

2022 IEEE International Memory Workshop (IMW), 2022, p.1-4

2022

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Understanding the kinetics of Metal Induced Lateral Crystallization process to enhance the poly-Si channel quality and current conduction in 3-D NAND memory

2021 IEEE International Electron Devices Meeting (IEDM), 2021, p.10.2.1-10.2.4

2021

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IEEE_Xplore

High-k gadolinium and aluminum scandates for hybrid floating gate NAND flash

Microelectronic engineering, 2013-09, Vol.109, p.220-222

2013

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First Demonstration of Ruthenium and Molybdenum Word lines Integrated into 40nm Pitch 3D-NAND Memory Devices

2021 Symposium on VLSI Technology, 2021, p.1-2

2021

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S-passivation of the Ge gate stack: Tuning the gate stack properties by changing the atomic layer deposition oxidant precursor

Journal of applied physics, 2011-10, Vol.110 (8), p.084907-084907-8

2011

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Direct observation of both contact and remote oxygen scavenging of GeO{sub 2} in a metal-oxide-semiconductor stack

Journal of applied physics, 2014-10, Vol.116 (16)

2014

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Gate-all-around InGaAs nanowire FETS with peak transconductance of 2200μS/μm at 50nm Lg using a replacement Fin RMG flow

2015 IEEE International Electron Devices Meeting (IEDM), 2015, p.31.1.1-31.1.4

2015

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IEEE_Xplore

Enabling Logic with Backside Connectivity via n-TSVs and its Potential as a Scaling Booster

2021 Symposium on VLSI Technology, 2021, p.1-2

2021

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Record mobility (μeff ∼3100 cm2/V-s) and reliability performance (Vov∼0.5V for 10yr operation) of In0.53Ga0.47As MOS devices using improved surface preparation and a novel interfacial layer

2016 IEEE Symposium on VLSI Technology, 2016, p.1-2

2016

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Band alignment of Hf–Zr oxides on Al 2O 3/GeO 2/Ge stacks

Microelectronic engineering, 2011, Vol.88 (7), p.1557-1559

2011

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Silicate formation and thermal stability of ternary rare earth oxides as high- k dielectrics

Journal of vacuum science & technology. A, Vacuum, surfaces, and films, 2008-07, Vol.26 (4), p.724-730

2008

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Impact of La–OH bonds on the retention of Co/LaSiO CBRAM

The VO2 interface, the metal-insulator transition tunnel junction, and the metal-insulator transition switch On-Off resistance

Direct observation of both contact and remote oxygen scavenging of GeO2 in a metal-oxide-semiconductor stack

Chemisorption of ALD precursors in and on porous low-k films

An InGaAs/InP quantum well finfet using the replacement fin process integrated in an RMG flow on 300mm Si substrates

First demonstration of monocrystalline silicon macaroni channel for 3-D NAND memory devices

Band alignment of Hf―Zr oxides on Al2O3/GeO2/Ge stacks

Atomic-layer-deposited tantalum silicate as a gate dielectric for III–V MOS devices

Si cap passivation for Ge nMOS applications

Atomic layer deposition of Al2O3 on S-passivated Ge

Scalability of InGaAs gate-all-around FET integrated on 300mm Si platform: Demonstration of channel width down to 7nm and Lg down to 36nm

Understanding the potential and limitations of HfAlO as interpoly dielectric in floating-gate Flash memory

Effect of the switching layer on CBRAM reliability and benchmarking against OxRAM devices

Electrical Properties of Low-VT Metal-Gated n-MOSFETs Using La2O3/SiOx as Interfacial Layer Between HfLaO High-κ Dielectrics and Si Channel

High-K incorporated in a SiON tunnel layer for 3D NAND programming voltage reduction

Understanding the kinetics of Metal Induced Lateral Crystallization process to enhance the poly-Si channel quality and current conduction in 3-D NAND memory

High-k gadolinium and aluminum scandates for hybrid floating gate NAND flash

First Demonstration of Ruthenium and Molybdenum Word lines Integrated into 40nm Pitch 3D-NAND Memory Devices

S-passivation of the Ge gate stack: Tuning the gate stack properties by changing the atomic layer deposition oxidant precursor

Direct observation of both contact and remote oxygen scavenging of GeO{sub 2} in a metal-oxide-semiconductor stack

Gate-all-around InGaAs nanowire FETS with peak transconductance of 2200μS/μm at 50nm Lg using a replacement Fin RMG flow

Enabling Logic with Backside Connectivity via n-TSVs and its Potential as a Scaling Booster

Record mobility (μeff ∼3100 cm2/V-s) and reliability performance (Vov∼0.5V for 10yr operation) of In0.53Ga0.47As MOS devices using improved surface preparation and a novel interfacial layer

Band alignment of Hf–Zr oxides on Al 2O 3/GeO 2/Ge stacks

Silicate formation and thermal stability of ternary rare earth oxides as high- k dielectrics

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