UB Paderborn / Katalog / Suche / in CDI

1 – 25 von 265

Sortiert nach

Positive bias temperature instability of HfO2-based gate stacks at reduced thermal budget for future CMOS technologies

Journal of applied physics, 2020-09, Vol.128 (10)

2020

Volltextzugriff (PDF)

Investigation of Imprint in FE-HfO₂ and Its Recovery

IEEE transactions on electron devices, 2020-11, Vol.67 (11), p.4911-4917

2020

Volltextzugriff (PDF)

Defect profiling in FEFET Si:HfO2 layers

Applied physics letters, 2020-11, Vol.117 (20)

2020

Volltextzugriff (PDF)

Impact of Charge Trapping and Depolarization on Data Retention Using Simultaneous P-V and I-V in HfO₂-Based Ferroelectric FET

IEEE transactions on electron devices, 2021-09, Vol.68 (9), p.4391-4396

2021

Volltextzugriff (PDF)

Total-Ionizing-Dose Effects in IGZO Thin-Film Transistors With SiO₂ Oxygen-Penetration Layers

IEEE transactions on nuclear science, 2024-04, Vol.71 (4), p.461-468

2024

Volltextzugriff (PDF)

Total-Ionizing-Dose Effects in IGZO Thin-Film Transistors

IEEE transactions on nuclear science, 2023-08, Vol.70 (8), p.1-1

2023

Volltextzugriff (PDF)

Low-frequency noise and defects in copper and ruthenium resistors

Applied physics letters, 2019-05, Vol.114 (20)

2019

Volltextzugriff (PDF)

Low-frequency noise assessment of ferro-electric field-effect transistors with Si-doped HfO2 gate dielectric

AIP advances, 2021-01, Vol.11 (1), p.015219-015219-4

2021

Volltextzugriff (PDF)

Geometry Dependence of Total-Dose Effects in Bulk FinFETs

IEEE transactions on nuclear science, 2014-12, Vol.61 (6), p.2951-2958

2014

Volltextzugriff (PDF)

X-Ray and Proton Radiation Effects on 40 nm CMOS Physically Unclonable Function Devices

IEEE transactions on nuclear science, 2018-08, Vol.65 (8), p.1519-1524

2018

Volltextzugriff (PDF)

Laser- and Heavy Ion-Induced Charge Collection in Bulk FinFETs

IEEE transactions on nuclear science, 2011-12, Vol.58 (6), p.2563-2569

2011

Volltextzugriff (PDF)

Quantitative retention model for filamentary oxide-based resistive RAM

Microelectronic engineering, 2017-06, Vol.178, p.38-41

2017

Volltextzugriff (PDF)

Mapping of CMOS FET degradation in bias space—Application to dram peripheral devices

Journal of vacuum science and technology. B, Nanotechnology & microelectronics, 2017-01, Vol.35 (1)

2017

Volltextzugriff (PDF)

Evaluating Forksheet FET Reliability Concerns by Experimental Comparison with Co-integrated Nanosheets

2022 IEEE International Reliability Physics Symposium (IRPS), 2022, p.5A.2-1-5A.2-7

2022

Volltextzugriff (PDF)

Heavy-Ion-Induced Current Transients in Bulk and SOI FinFETs

IEEE transactions on nuclear science, 2012-12, Vol.59 (6), p.2674-2681

2012

Volltextzugriff (PDF)

A 5-GHz fully integrated ESD-protected low-noise amplifier in 90-nm RF CMOS

IEEE journal of solid-state circuits, 2005-07, Vol.40 (7), p.1434-1442

2005

Volltextzugriff (PDF)

Enabling Active Backside Technology for ESD and LU Reliability in DTCO/STCO

2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2022, p.431-432

2022

Volltextzugriff (PDF)

Novel low thermal budget gate stack solutions for BTI reliability in future Logic Device technologies : Invited paper

2021 International Conference on IC Design and Technology (ICICDT), 2021, p.1-4

2021

Volltextzugriff (PDF)

Analysis of the Features of Hot-Carrier Degradation in FinFETs

Semiconductors (Woodbury, N.Y.), 2018-10, Vol.52 (10), p.1298-1302

2018

Volltextzugriff (PDF)

Impact of the Device Geometric Parameters on Hot-Carrier Degradation in FinFETs

Semiconductors (Woodbury, N.Y.), 2018-12, Vol.52 (13), p.1738-1742

2018

Volltextzugriff (PDF)

A Fully Integrated 7.3 kV HBM ESD-Protected Transformer-Based 4.5-6 GHz CMOS LNA

IEEE journal of solid-state circuits, 2009-02, Vol.44 (2), p.344-353

2009

Volltextzugriff (PDF)

Impact of Back-Gate Bias and Device Geometry on the Total Ionizing Dose Response of 1-Transistor Floating Body RAMs

IEEE transactions on nuclear science, 2012-12, Vol.59 (6), p.2966-2973

2012

Volltextzugriff (PDF)

Reliability Engineering Enabling Continued Logic for Memory Device Scaling

2019 IEEE International Integrated Reliability Workshop (IIRW), 2019, p.1-11

2019

Volltextzugriff (PDF)

Characterization of self-heating in high-mobility Ge FinFET pMOS devices

2015 Symposium on VLSI Technology (VLSI Technology), 2015, p.T60-T61

2015

Volltextzugriff (PDF)

Comphy — A compact-physics framework for unified modeling of BTI

Microelectronics and reliability, 2018-06, Vol.85, p.49-65

2018

Volltextzugriff (PDF)

1 – 25 von 265

Suche als RSS-Feed

Suchergebnisse filtern

Filter anzeigen

Nur zeigen

Geprüft (Peer-Review)
(92)
Mit Volltextzugriff
(237)

Publikationsform

Sprache

Englisch
(265)
Japanisch
(10)

Erscheinungsjahr

n.n

Thema

Science & Technology
(155)
Technology
(148)
Engineering
(146)
Engineering, Electrical & Electronic
(146)
Logic Gates
(82)
Stress
(61)
Silicon
(58)
Electrostatic Discharge
(56)
Physical Sciences
(49)
Physics
(49)
Degradation
(47)
Physics, Applied
(45)
Radio Frequency
(41)
Finfets
(38)
Reliability
(36)
Cmos Technology
(31)
Electrostatic Discharges
(27)
Transistors
(24)
Cmos
(23)
Nuclear Science & Technology
(23)

15 weitere anzeigen...

Weniger anzeigen...

Neu hinzugefügt

... seit 30 Tagen
(1)
... seit 90 Tagen
(2)

Menü

Weitere Dienste

Einstellungen

Positive bias temperature instability of HfO2-based gate stacks at reduced thermal budget for future CMOS technologies

Investigation of Imprint in FE-HfO₂ and Its Recovery

Defect profiling in FEFET Si:HfO2 layers

Impact of Charge Trapping and Depolarization on Data Retention Using Simultaneous P-V and I-V in HfO₂-Based Ferroelectric FET

Total-Ionizing-Dose Effects in IGZO Thin-Film Transistors With SiO₂ Oxygen-Penetration Layers

Total-Ionizing-Dose Effects in IGZO Thin-Film Transistors

Low-frequency noise and defects in copper and ruthenium resistors

Low-frequency noise assessment of ferro-electric field-effect transistors with Si-doped HfO2 gate dielectric

Geometry Dependence of Total-Dose Effects in Bulk FinFETs

X-Ray and Proton Radiation Effects on 40 nm CMOS Physically Unclonable Function Devices

Laser- and Heavy Ion-Induced Charge Collection in Bulk FinFETs

Quantitative retention model for filamentary oxide-based resistive RAM

Mapping of CMOS FET degradation in bias space—Application to dram peripheral devices

Evaluating Forksheet FET Reliability Concerns by Experimental Comparison with Co-integrated Nanosheets

Heavy-Ion-Induced Current Transients in Bulk and SOI FinFETs

A 5-GHz fully integrated ESD-protected low-noise amplifier in 90-nm RF CMOS

Enabling Active Backside Technology for ESD and LU Reliability in DTCO/STCO

Novel low thermal budget gate stack solutions for BTI reliability in future Logic Device technologies : Invited paper

Analysis of the Features of Hot-Carrier Degradation in FinFETs

Impact of the Device Geometric Parameters on Hot-Carrier Degradation in FinFETs

A Fully Integrated 7.3 kV HBM ESD-Protected Transformer-Based 4.5-6 GHz CMOS LNA

Impact of Back-Gate Bias and Device Geometry on the Total Ionizing Dose Response of 1-Transistor Floating Body RAMs

Reliability Engineering Enabling Continued Logic for Memory Device Scaling

Characterization of self-heating in high-mobility Ge FinFET pMOS devices

Comphy — A compact-physics framework for unified modeling of BTI

Suchergebnisse filtern