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Spiking Neural Networks Based on OxRAM Synapses for Real-Time Unsupervised Spike Sorting

Frontiers in neuroscience, 2016-11, Vol.10 (NOV), p.474-474

2016

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Silicon non-volatile memories: paths of innovation

de Salvo, Barbara

2010

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Ferrocene and Porphyrin Monolayers on Si(100) Surfaces: Preparation and Effect of Linker Length on Electron Transfer

Chemphyschem, 2009-04, Vol.10 (6), p.963-971

2009

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Exploring Memory-Oriented Design Optimization of Edge AI Hardware for Extended Reality Applications

IEEE MICRO, 2023-11, Vol.43 (6), p.40-49

2023

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Siracusa: A 16 nm Heterogenous RISC-V SoC for Extended Reality With At-MRAM Neural Engine

IEEE journal of solid-state circuits, 2024-07, Vol.59 (7), p.2055-2069

2024

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Effect of the Active Layer Thickness and Temperature on the Switching Kinetics of GeS2-Based Conductive Bridge Memories

Jpn J Appl Phys, 2013-04, Vol.52 (4), p.04CD02-04CD02-4

2013

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Narrow Heater Bottom Electrode‐Based Phase Change Memory as a Bidirectional Artificial Synapse

Advanced electronic materials, 2018-09, Vol.4 (9), p.n/a

2018

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Electrical Behavior of Phase-Change Memory Cells Based on GeTe

IEEE electron device letters, 2010-05, Vol.31 (5), p.488-490

2010

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Explanation of the Charge Trapping Properties of Silicon Nitride Storage Layers for NVMs-Part II: Atomistic and Electrical Modeling

IEEE transactions on electron devices, 2011-08, Vol.58 (8), p.2490-2499

2011

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Siracusa: A Low-Power On-Sensor RISC-V SoC for Extended Reality Visual Processing in 16nm CMOS

ESSCIRC 2023- IEEE 49th European Solid State Circuits Conference (ESSCIRC), 2023, p.217-220

2023

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Charge Localization during Program and Retention in Nitrided Read Only Memory-Like Nonvolatile Memory Devices

Japanese Journal of Applied Physics, 2010-04, Vol.49 (4), p.04DD12-04DD12-5

2010

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Corrigendum: Spiking Neural Networks Based on OxRAM Synapses for Real-Time Unsupervised Spike Sorting

Frontiers in neuroscience, 2017-08, Vol.11, p.486-486

2017

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Three-dimensional Simulation of the dependence of the programming window of SOI nanocrystal memories on the channel width

IEEE transactions on nanotechnology, 2005-05, Vol.4 (3), p.326-330

2005

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Analytical model of the effects of a nonuniform distribution of stored charge on the electrical characteristics of discrete-trap nonvolatile memories

IEEE transactions on nanotechnology, 2005-05, Vol.4 (3), p.360-368

2005

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Bilayer Metal-Oxide Conductive Bridge Memory Technology for Improved Window Margin and Reliability

IEEE journal of the Electron Devices Society, 2016-09, Vol.4 (5), p.314-320

2016

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Modeling of the programming window distribution in multinanocrystals memories

IEEE transactions on nanotechnology, 2003-12, Vol.2 (4), p.277-284

2003

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Interface Engineering of Ag- -Based Conductive Bridge RAM for Reconfigurable Logic Applications

IEEE transactions on electron devices, 2014-03, Vol.61 (3), p.793-800

2014

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Manipulation of periodic Coulomb blockade oscillations in ultra-scaled memories by single electron charging of silicon nanocrystal floating gates

IEEE transactions on nanotechnology, 2005-05, Vol.4 (3), p.374-379

2005

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HfO2-Based RRAM: Electrode Effects, Ti/HfO2 Interface, Charge Injection, and Oxygen (O) Defects Diffusion Through Experiment and Ab Initio Calculations

IEEE transactions on electron devices, 2016-01, Vol.63 (1), p.360-368

2016

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Brain-Inspired technologies: Towards chips that think?

2018 IEEE International Solid - State Circuits Conference - (ISSCC), 2018, p.12-18

De Salvo, Barbara

2018

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Investigation of Hybrid Molecular/Silicon Memories With Redox-Active Molecules Acting as Storage Media

IEEE transactions on nanotechnology, 2009-03, Vol.8 (2), p.204-213

2009

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On the Origin of Low-Resistance State Retention Failure in HfO2-Based RRAM and Impact of Doping/Alloying

IEEE transactions on electron devices, 2015-12, Vol.62 (12), p.4029-4036

2015

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ANSA: Adaptive Near-Sensor Architecture for Dynamic DNN Processing in Compact Form Factors

IEEE transactions on circuits and systems. I, Regular papers, 2023-03, Vol.70 (3), p.1256-1269

2023

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Bio-Inspired Stochastic Computing Using Binary CBRAM Synapses

IEEE transactions on electron devices, 2013-07, Vol.60 (7), p.2402-2409

2013

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Thermally Constrained Codesign of Heterogeneous 3-D Integration of Compute-in-Memory, Digital ML Accelerator, and RISC-V Cores for Mixed ML and Non-ML Workloads

IEEE transactions on very large scale integration (VLSI) systems, 2024-06, p.1-8

2024

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Spiking Neural Networks Based on OxRAM Synapses for Real-Time Unsupervised Spike Sorting

Silicon non-volatile memories: paths of innovation

Ferrocene and Porphyrin Monolayers on Si(100) Surfaces: Preparation and Effect of Linker Length on Electron Transfer

Exploring Memory-Oriented Design Optimization of Edge AI Hardware for Extended Reality Applications

Siracusa: A 16 nm Heterogenous RISC-V SoC for Extended Reality With At-MRAM Neural Engine

Effect of the Active Layer Thickness and Temperature on the Switching Kinetics of GeS2-Based Conductive Bridge Memories

Narrow Heater Bottom Electrode‐Based Phase Change Memory as a Bidirectional Artificial Synapse

Electrical Behavior of Phase-Change Memory Cells Based on GeTe

Explanation of the Charge Trapping Properties of Silicon Nitride Storage Layers for NVMs-Part II: Atomistic and Electrical Modeling

Siracusa: A Low-Power On-Sensor RISC-V SoC for Extended Reality Visual Processing in 16nm CMOS

Charge Localization during Program and Retention in Nitrided Read Only Memory-Like Nonvolatile Memory Devices

Corrigendum: Spiking Neural Networks Based on OxRAM Synapses for Real-Time Unsupervised Spike Sorting

Three-dimensional Simulation of the dependence of the programming window of SOI nanocrystal memories on the channel width

Analytical model of the effects of a nonuniform distribution of stored charge on the electrical characteristics of discrete-trap nonvolatile memories

Bilayer Metal-Oxide Conductive Bridge Memory Technology for Improved Window Margin and Reliability

Modeling of the programming window distribution in multinanocrystals memories

Interface Engineering of Ag- -Based Conductive Bridge RAM for Reconfigurable Logic Applications

Manipulation of periodic Coulomb blockade oscillations in ultra-scaled memories by single electron charging of silicon nanocrystal floating gates

HfO2-Based RRAM: Electrode Effects, Ti/HfO2 Interface, Charge Injection, and Oxygen (O) Defects Diffusion Through Experiment and Ab Initio Calculations

Brain-Inspired technologies: Towards chips that think?

Investigation of Hybrid Molecular/Silicon Memories With Redox-Active Molecules Acting as Storage Media

On the Origin of Low-Resistance State Retention Failure in HfO2-Based RRAM and Impact of Doping/Alloying

ANSA: Adaptive Near-Sensor Architecture for Dynamic DNN Processing in Compact Form Factors

Bio-Inspired Stochastic Computing Using Binary CBRAM Synapses

Thermally Constrained Codesign of Heterogeneous 3-D Integration of Compute-in-Memory, Digital ML Accelerator, and RISC-V Cores for Mixed ML and Non-ML Workloads

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