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Heteroepitaxy of InP on Si(001) by selective-area metal organic vapor-phase epitaxy in sub-50 nm width trenches: The role of the nucleation layer and the recess engineering

Journal of applied physics, 2014-01, Vol.115 (2)

2014

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Positive bias temperature instability of HfO2-based gate stacks at reduced thermal budget for future CMOS technologies

Journal of applied physics, 2020-09, Vol.128 (10)

2020

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Low-Frequency Noise Investigation of GaN/AlGaN Metal-Oxide-Semiconductor High-Electron-Mobility Field-Effect Transistor With Different Gate Length and Orientation

IEEE transactions on electron devices, 2020-08, Vol.67 (8), p.3062-3068

2020

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Transport spectroscopy of a single dopant in a gated silicon nanowire

Physical review letters, 2006-11, Vol.97 (20), p.206805-206805, Article 206805

2006

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Parasitic subthreshold drain current and low frequency noise in GaN/AlGaN metal-oxide-semiconductor high-electron-mobility field-effect-transistors

Semiconductor science and technology, 2020-12, Vol.36 (2), p.24003

2020

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InGaAs tunnel FET with sub-nanometer EOT and sub-60 mV/dec sub-threshold swing at room temperature

Applied physics letters, 2016-12, Vol.109 (24)

2016

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Gate-induced quantum-confinement transition of a single dopant atom in a silicon FinFET

Nature physics, 2008-06, Vol.4 (8), p.656-661

2008

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Understanding the factors affecting contact resistance in nanowire field effect transistors (NWFETs) to improve nanoscale contacts for future scaling

Journal of applied physics, 2022-07, Vol.132 (2)

2022

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First Demonstration of Vertically Stacked Gate-All-Around Highly Strained Germanium Nanowire pFETs

IEEE transactions on electron devices, 2018-11, Vol.65 (11), p.5145-5150

2018

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Gate-induced quantum-confinement transition of a single dopant atom in a silicon FinFET

Nature physics, 2008-08, Vol.4 (8), p.656-661

2008

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Analysis of the parasitic S/D resistance in multiple-gate FETs

IEEE transactions on electron devices, 2005-06, Vol.52 (6), p.1132-1140

2005

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Analysis of Gate-Metal Resistance in CMOS-Compatible RF GaN HEMTs

IEEE transactions on electron devices, 2020-11, Vol.67 (11), p.4592-4596

2020

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Strained Germanium Gate-All-Around pMOS Device Demonstration Using Selective Wire Release Etch Prior to Replacement Metal Gate Deposition

IEEE transactions on electron devices, 2017-11, Vol.64 (11), p.4587-4593

2017

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The Impact of Width Downscaling on the High-Frequency Characteristics of InGaAs Nanowire FETs

IEEE journal of the Electron Devices Society, 2022, Vol.10, p.854-859

2022

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Systematic study of interfacial reactions induced by metal electrodes in high-k/InGaAs gate stacks

Applied physics letters, 2016-10, Vol.109 (17)

2016

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Selective metal-organic chemical vapor deposition growth of high quality GaAs on Si(001)

Applied physics letters, 2014-08, Vol.105 (6)

2014

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Observation and understanding of anisotropic strain relaxation in selectively grown SiGe fin structures

Nanotechnology, 2017-04, Vol.28 (14), p.145703-145703

2017

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Dislocations behavior in highly mismatched III-Sb growth and their impact on the fabrication of top-down n + InAs/p + GaSb nanowire tunneling devices

Journal of applied physics, 2018-11, Vol.124 (19)

2018

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Assessment of DC and low-frequency noise performances of triple-gate FinFETs at cryogenic temperatures

Semiconductor science and technology, 2016-12, Vol.31 (12), p.124006

2016

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Direct Measurement of Top and Sidewall Interface Trap Density in SOI FinFETs

IEEE electron device letters, 2007-03, Vol.28 (3), p.232-234

2007

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Record GmSAT/SSSAT and PBTI Reliability in Si-Passivated Ge nFinFETs by Improved Gate-Stack Surface Preparation

IEEE transactions on electron devices, 2019-12, Vol.66 (12), p.5387-5392

2019

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Investigation of device transport characteristics enhancement of In0.53Ga0.47As MOSFET through in situ NH3/N2 remote-plasma treatment

AIP advances, 2021-01, Vol.11 (1), p.015050-015050-8

2021

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Selective area growth of InP in shallow trench isolation on large scale Si(001) wafer using defect confinement technique

Journal of applied physics, 2013-07, Vol.114 (3)

2013

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A wafer-scaled III-V vertical FET fabrication by means of plasma etching

Microelectronic engineering, 2018-05, Vol.192, p.14-18

2018

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3-D Sequential Stacked Planar Devices Featuring Low-Temperature Replacement Metal Gate Junctionless Top Devices With Improved Reliability

IEEE transactions on electron devices, 2018-11, Vol.65 (11), p.5165-5171

2018

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Heteroepitaxy of InP on Si(001) by selective-area metal organic vapor-phase epitaxy in sub-50 nm width trenches: The role of the nucleation layer and the recess engineering

Positive bias temperature instability of HfO2-based gate stacks at reduced thermal budget for future CMOS technologies

Low-Frequency Noise Investigation of GaN/AlGaN Metal-Oxide-Semiconductor High-Electron-Mobility Field-Effect Transistor With Different Gate Length and Orientation

Transport spectroscopy of a single dopant in a gated silicon nanowire

Parasitic subthreshold drain current and low frequency noise in GaN/AlGaN metal-oxide-semiconductor high-electron-mobility field-effect-transistors

InGaAs tunnel FET with sub-nanometer EOT and sub-60 mV/dec sub-threshold swing at room temperature

Gate-induced quantum-confinement transition of a single dopant atom in a silicon FinFET

Understanding the factors affecting contact resistance in nanowire field effect transistors (NWFETs) to improve nanoscale contacts for future scaling

First Demonstration of Vertically Stacked Gate-All-Around Highly Strained Germanium Nanowire pFETs

Gate-induced quantum-confinement transition of a single dopant atom in a silicon FinFET

Analysis of the parasitic S/D resistance in multiple-gate FETs

Analysis of Gate-Metal Resistance in CMOS-Compatible RF GaN HEMTs

Strained Germanium Gate-All-Around pMOS Device Demonstration Using Selective Wire Release Etch Prior to Replacement Metal Gate Deposition

The Impact of Width Downscaling on the High-Frequency Characteristics of InGaAs Nanowire FETs

Systematic study of interfacial reactions induced by metal electrodes in high-k/InGaAs gate stacks

Selective metal-organic chemical vapor deposition growth of high quality GaAs on Si(001)

Observation and understanding of anisotropic strain relaxation in selectively grown SiGe fin structures

Dislocations behavior in highly mismatched III-Sb growth and their impact on the fabrication of top-down n + InAs/p + GaSb nanowire tunneling devices

Assessment of DC and low-frequency noise performances of triple-gate FinFETs at cryogenic temperatures

Direct Measurement of Top and Sidewall Interface Trap Density in SOI FinFETs

Record GmSAT/SSSAT and PBTI Reliability in Si-Passivated Ge nFinFETs by Improved Gate-Stack Surface Preparation

Investigation of device transport characteristics enhancement of In0.53Ga0.47As MOSFET through in situ NH3/N2 remote-plasma treatment

Selective area growth of InP in shallow trench isolation on large scale Si(001) wafer using defect confinement technique

A wafer-scaled III-V vertical FET fabrication by means of plasma etching

3-D Sequential Stacked Planar Devices Featuring Low-Temperature Replacement Metal Gate Junctionless Top Devices With Improved Reliability

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