UB Paderborn / Katalog / Suche / in CDI

Sortiert nach

Einfacher Volltextzugriff von (fast) überall

Installieren Sie die LibKey Nomad-Browsererweiterung und erhalten Sie von vielen Webseiten einfachen Zugriff auf lizenzierte Volltexte oder Open Access Publikationen. Mehr erfahren...

Inverters With Strained Si Nanowire Complementary Tunnel Field-Effect Transistors

IEEE electron device letters, 2013-06, Vol.34 (6), p.813-815

2013

Volltextzugriff (PDF)

Comparative Simulation Analysis of Process-Induced Variability in Nanoscale SOI and Bulk Trigate FinFETs

IEEE transactions on electron devices, 2013-11, Vol.60 (11), p.3611-3617

2013

Volltextzugriff (PDF)

Strained Si and SiGe Nanowire Tunnel FETs for Logic and Analog Applications

IEEE journal of the Electron Devices Society, 2015-05, Vol.3 (3), p.103-114

2015

Volltextzugriff (PDF)

LDD and Back-Gate Engineering for Fully Depleted Planar SOI Transistors with Thin Buried Oxide

IEEE transactions on electron devices, 2010-06, Vol.57 (6), p.1319-1326

2010

Volltextzugriff (PDF)

Rare-Earth Scandate/TiN Gate Stacks in SOI MOSFETs Fabricated With a Full Replacement Gate Process

IEEE transactions on electron devices, 2011-03, Vol.58 (3), p.617-622

2011

Volltextzugriff (PDF)

Nanomechanical Response of the Si Lattice to Hydrogen Implantation and Annealing for Layer Splitting

Japanese Journal of Applied Physics, 2009-10, Vol.48 (10), p.101202

2009

Volltextzugriff (PDF)

The effect of triple well implant dose on performance of NMOS transistors

IEEE transactions on electron devices, 2002-03, Vol.49 (3), p.521-524

2002

Volltextzugriff (PDF)

Highly uniform and low-loss passive silicon photonics devices using a 300mm CMOS platform

OFC 2014, 2014, p.1-3

2014

Volltextzugriff (PDF)

Asymetrically strained high performance Germanium gate-all-around nanowire p-FETs featuring 3.5 nm wire width and contractible phase change liner stressor (Ge2Sb2Te5)

2013 IEEE International Electron Devices Meeting, 2013, p.26.6.1-26.6.4

2013

Volltextzugriff (PDF)

Simulation analysis of process-induced variability in nanoscale SOI and bulk FinFETs

2012 IEEE International SOI Conference (SOI), 2012, p.1-2

2012

Volltextzugriff (PDF)

Weakening of Hardness and Modulus of the Si Lattice by Hydrogen Implantation for Layer Transfer in Wafer Bonding Technology

ECS transactions, 2009, Vol.16 (8), p.385-391

2009

Volltextzugriff (PDF)

SiGe and Ge on Insulator Wafers

ECS transactions, 2011, Vol.35 (5), p.29-38

2011

Volltextzugriff (PDF)

Electrical Characterization of TbScO 3 /TiN Gate Stacks of MOS Capacitors and MOSFETs on Strained and Unstrained SOI

ECS transactions, 2010-10, Vol.33 (3), p.195-202

2010

Volltextzugriff (PDF)

Si based tunneling field effect transistors and inverters

71st Device Research Conference, 2013, p.193-194

2013

Volltextzugriff (PDF)

Evaluation of high dose, high energy boron implantation into Cz substrates for epi-replacement in CMOS technology

IEEE transactions on electron devices, 2001-09, Vol.48 (9), p.2043-2049

2001

Volltextzugriff (PDF)

Fabrication of Directly Bonded Si Substrates with Hybrid Crystal Orientation for Advanced Bulk CMOS Technology

ECS transactions, 2006, Vol.3 (4), p.409-415

2006

Volltextzugriff (PDF)

Fabrication of Directly Bonded Si Substrates with Hybrid Crystal Orientation for Advanced Bulk CMOS Technology

Meeting abstracts (Electrochemical Society), 2006-06, Vol.MA2006-02 (25), p.1241-1241

Bourdelle, Konstantin

2006

Volltextzugriff (PDF)

Determining the Mechanisms of Fracture in Group-IV Materials

Meeting abstracts (Electrochemical Society), 2006-02, Vol.MA2005-01 (12), p.550-550

Bourdelle, Konstantin

2006

Volltextzugriff (PDF)

Asymetrically strained high performance Germanium gate-all-around nanowire p-FETs featuring 3.5 nm wire width and contractible phase change liner stressor (Ge sub(2)Sb sub(2)Te sub(5 ))

Technical digest - International Electron Devices Meeting, 2013-12, p.26.6.1-26.6.4

2013

Volltextzugriff (PDF)

SiGe and Ge on Insulator Wafers

Meeting abstracts (Electrochemical Society), 2011-03, Vol.MA2011-01 (23), p.1413-1413

2011

Volltextzugriff (PDF)

Weakening of Hardness and Modulus of the Si Lattice by Hydrogen Implantation for Layer Transfer in Wafer Bonding Technology

Meeting abstracts (Electrochemical Society), 2008-08, Vol.MA2008-02 (33), p.2209-2209

2008

Volltextzugriff (PDF)

Electrical Characterization of TbScO 3 /TiN Gate Stacks of MOS Capacitors and MOSFETs on Strained and Unstrained SOI

Meeting abstracts (Electrochemical Society), 2010-07, Vol.MA2010-02 (22), p.1502-1502

2010

Volltextzugriff (PDF)

Back-gate mirror doping for fully depleted planar SOI transistors with thin buried oxide

Proceedings of 2010 International Symposium on VLSI Technology, System and Application, 2010, p.76-77

2010

Volltextzugriff (PDF)

Challenges and Progress in Germanium-on-Insulator Materials and Device Development Towards ULSI Integration

Meeting abstracts (Electrochemical Society), 2009-07, Vol.MA2009-02 (31), p.2387-2387

2009

Volltextzugriff (PDF)

1 – 25 von 25

Suche als RSS-Feed

Suchergebnisse filtern

Filter anzeigen

Nur zeigen

Geprüft (Peer-Review)
(9)
Mit Volltextzugriff
(13)

Publikationsform

Artikel
(16)
Tagungsberichte
(9)

Sprache

Englisch
(25)
Japanisch
(1)

Erscheinungsjahr

n.n

Thema

Science & Technology
(13)
Engineering
(12)
Engineering, Electrical & Electronic
(12)
Technology
(12)
Physical Sciences
(9)
Logic Gates
(8)
Physics
(8)
Physics, Applied
(7)
Silicon
(5)
Transistors
(4)
Applied Sciences
(3)
Devices
(3)
Doping
(3)
Electronics
(3)
Exact Sciences And Technology
(3)
Junctions
(3)
Semiconductor Devices
(3)
Semiconductor Electronics. Microelectronics. Optoelectronics. Solid State Devices
(3)
Tunneling
(3)
Annealing
(2)

15 weitere anzeigen...

Weniger anzeigen...

Kollektion

Menü

Weitere Dienste

Einstellungen

Inverters With Strained Si Nanowire Complementary Tunnel Field-Effect Transistors

Comparative Simulation Analysis of Process-Induced Variability in Nanoscale SOI and Bulk Trigate FinFETs

Strained Si and SiGe Nanowire Tunnel FETs for Logic and Analog Applications

LDD and Back-Gate Engineering for Fully Depleted Planar SOI Transistors with Thin Buried Oxide

Rare-Earth Scandate/TiN Gate Stacks in SOI MOSFETs Fabricated With a Full Replacement Gate Process

Nanomechanical Response of the Si Lattice to Hydrogen Implantation and Annealing for Layer Splitting

The effect of triple well implant dose on performance of NMOS transistors

Highly uniform and low-loss passive silicon photonics devices using a 300mm CMOS platform

Asymetrically strained high performance Germanium gate-all-around nanowire p-FETs featuring 3.5 nm wire width and contractible phase change liner stressor (Ge2Sb2Te5)

Simulation analysis of process-induced variability in nanoscale SOI and bulk FinFETs

Weakening of Hardness and Modulus of the Si Lattice by Hydrogen Implantation for Layer Transfer in Wafer Bonding Technology

SiGe and Ge on Insulator Wafers

Electrical Characterization of TbScO 3 /TiN Gate Stacks of MOS Capacitors and MOSFETs on Strained and Unstrained SOI

Si based tunneling field effect transistors and inverters

Evaluation of high dose, high energy boron implantation into Cz substrates for epi-replacement in CMOS technology

Challenges and Progress in Germanium-on-Insulator Materials and Device Development towards ULSI Integration

Fabrication of Directly Bonded Si Substrates with Hybrid Crystal Orientation for Advanced Bulk CMOS Technology

Fabrication of Directly Bonded Si Substrates with Hybrid Crystal Orientation for Advanced Bulk CMOS Technology

Determining the Mechanisms of Fracture in Group-IV Materials

Asymetrically strained high performance Germanium gate-all-around nanowire p-FETs featuring 3.5 nm wire width and contractible phase change liner stressor (Ge sub(2)Sb sub(2)Te sub(5 ))

SiGe and Ge on Insulator Wafers

Weakening of Hardness and Modulus of the Si Lattice by Hydrogen Implantation for Layer Transfer in Wafer Bonding Technology

Electrical Characterization of TbScO 3 /TiN Gate Stacks of MOS Capacitors and MOSFETs on Strained and Unstrained SOI

Back-gate mirror doping for fully depleted planar SOI transistors with thin buried oxide

Challenges and Progress in Germanium-on-Insulator Materials and Device Development Towards ULSI Integration

Suchergebnisse filtern