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A 0.36 pJ/bit, 0.025 mm ^}, 12.5 Gb/s Forwarded-Clock Receiver With a Stuck-Free Delay-Locked Loop and a Half-Bit Delay Line in 65-nm CMOS Technology

IEEE transactions on circuits and systems. I, Regular papers, 2016-09, Vol.63 (9), p.1393-1403

2016

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A 1.01-V 8.5-Gb/s/pin 16-Gb LPDDR5x SDRAM With Advanced I/O Circuitry for High-Speed and Low-Power Applications

IEEE journal of solid-state circuits, 2024, p.1-9

2024

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A 1.01V 8.5Gb/s/pin 16Gb LPDDR5x SDRAM with Self-Pre-Emphasized Stacked-Tx, Supply Voltage Insensitive Rx, and Optimized Clock Using 4th-Generation 10nm DRAM Process for High-Speed and Low-Power Applications

2023 IEEE Asian Solid-State Circuits Conference (A-SSCC), 2023, p.1-4

2023

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The 1,2,3-triazole derivative KP-A021 suppresses osteoclast differentiation and function by inhibiting RANKL-mediated MEK-ERK signaling pathway

Experimental biology and medicine (Maywood, N.J.), 2015-12, Vol.240 (12), p.1690-1697

2015

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A 1.2 V 1.5 Gb/s 72 Mb DDR3 SRAM

2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC, 2003, p.300-494 vol.1

2003

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A 1.2-V 1.5-Gb/s 72-Mb DDR3 SRAM

IEEE journal of solid-state circuits, 2003-11, Vol.38 (11), p.1943-1951

2003

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A 1.2 V 20 nm 307 GB/s HBM DRAM With At-Speed Wafer-Level IO Test Scheme and Adaptive Refresh Considering Temperature Distribution

IEEE journal of solid-state circuits, 2017-01, Vol.52 (1), p.250-260

2017

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A 1.2 V 30 nm 3.2 Gb/s/pin 4 Gb DDR4 SDRAM With Dual-Error Detection and PVT-Tolerant Data-Fetch Scheme

IEEE journal of solid-state circuits, 2013-01, Vol.48 (1), p.168-177

2013

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A 1.2 V 7-bit 1 GS/s CMOS Flash ADC with Cascaded Voting and Offset Calibration

JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, 2008, 8(4), 32, pp.318-325

2008

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A 1.2 V 7-bit 1 GS/s CMOS Flash ADC with Cascaded Voting and Offset Calibration

Journal of semiconductor technology and science, 2008, Vol.8 (4), p.318-325

2008

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A 1.23W/mm2 83.7%-Efficiency 400MHz 6-Phase Fully Integrated Buck Converter in 28nm CMOS with On-Chip Capacitor Dynamic Re-Allocation for Inter-Inductor Current Balancing and Fast DVS of 75mV/ns

2022 IEEE International Solid- State Circuits Conference (ISSCC), 2022, Vol.65, p.1-3

2022

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1.2V 1.6Gb/s 56nm 6F2 4Gb DDR3 SDRAM with hybrid-I/O sense amplifier and segmented sub-array architecture

2009 IEEE International Solid-State Circuits Conference - Digest of Technical Papers, 2009, p.128-129,129a

2009

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A 1.2V 30nm 1.6Gb/s/pin 4Gb LPDDR3 SDRAM with input skew calibration and enhanced control scheme

2012 IEEE International Solid-State Circuits Conference, 2012, p.44-46

2012

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A 1.2V 30nm 3.2Gb/s/pin 4Gb DDR4 SDRAM with dual-error detection and PVT-tolerant data-fetch scheme

2012 IEEE International Solid-State Circuits Conference, 2012, p.38-40

2012

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1.55-μm DFB lasers over a wide temperature range for analog application

Microwave and optical technology letters, 2006-02, Vol.48 (2), p.273-275

2006

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A 1.93-pJ/Bit PCI Express Gen4 PHY Transmitter with On-Chip Supply Regulators in 28 nm CMOS

Electronics (Basel), 2021-01, Vol.10 (1), p.68

2021

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1. Arterial Stiffness in Masked Hypertension and True Hypertension

Artery research, 2009, Vol.3 (3), p.94-94

2009

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1-D free-electron laser model without the slowly-varying approximation

Nuclear instruments & methods in physics research. Section A, Accelerators, spectrometers, detectors and associated equipment, 1995-04, Vol.358 (1-3), p.516-518

1995

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1‐Dehydro‐[10]‐gingerdione from ginger inhibits IKKβ activity for NF‐κB activation and suppresses NF‐κB‐regulated expression of inflammatory genes

British journal of pharmacology, 2012-09, Vol.167 (1), p.128-140

2012

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1/f Noise Characteristics of AlGaN/GaN FinFETs with and without TMAH surface treatment

Microelectronic engineering, 2015-11, Vol.147, p.134-136

2015

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1/f Noise characteristics of P-channel tin monoxide thin-film transistors

2016 23rd International Workshop on Active-Matrix Flatpanel Displays and Devices (AM-FPD), 2016, p.143-145

2016

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10-Year Outcomes of Stents Versus Coronary Artery Bypass Grafting for Left Main Coronary Artery Disease

Journal of the American College of Cardiology, 2018-12, Vol.72 (23), p.2813-2822

2018

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100 cases of endoscopic thyroidectomy: breast approach

Surgical laparoscopy, endoscopy & percutaneous techniques, 2003-02, Vol.13 (1), p.20-25

2003

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1001 GLYCOSYLATED HEMOGLOBIN COULD BE CONSIDERED AS IMPORTANT ROLE IN PROGRESSION OF ARTERIAL STIFFNESS IN HYPERTENSIVE PATIENTS WITHOUT DM

Journal of hypertension, 2012-09, Vol.30 (Supplement 1), p.e290

2012

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1009 CYANIDIN-3-O-β-D-GLUCOPYRANOSIDE CONCENTRATED MATERIALS FROM MULBERRY FRUIT HAS A POTENCY TO PROTECT ERECTILE FUNCTION BY MINIMIZING OXIDATIVE STRESS IN A RAT MODEL OF DIABETIC ERECTILE DYSFUNCTION

The Journal of urology, 2012-04, Vol.187 (4), p.e410-e410

2012

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A 0.36 pJ/bit, 0.025 mm ^}, 12.5 Gb/s Forwarded-Clock Receiver With a Stuck-Free Delay-Locked Loop and a Half-Bit Delay Line in 65-nm CMOS Technology

A 1.01-V 8.5-Gb/s/pin 16-Gb LPDDR5x SDRAM With Advanced I/O Circuitry for High-Speed and Low-Power Applications

A 1.01V 8.5Gb/s/pin 16Gb LPDDR5x SDRAM with Self-Pre-Emphasized Stacked-Tx, Supply Voltage Insensitive Rx, and Optimized Clock Using 4th-Generation 10nm DRAM Process for High-Speed and Low-Power Applications

The 1,2,3-triazole derivative KP-A021 suppresses osteoclast differentiation and function by inhibiting RANKL-mediated MEK-ERK signaling pathway

A 1.2 V 1.5 Gb/s 72 Mb DDR3 SRAM

A 1.2-V 1.5-Gb/s 72-Mb DDR3 SRAM

A 1.2 V 20 nm 307 GB/s HBM DRAM With At-Speed Wafer-Level IO Test Scheme and Adaptive Refresh Considering Temperature Distribution

A 1.2 V 30 nm 3.2 Gb/s/pin 4 Gb DDR4 SDRAM With Dual-Error Detection and PVT-Tolerant Data-Fetch Scheme

A 1.2 V 7-bit 1 GS/s CMOS Flash ADC with Cascaded Voting and Offset Calibration

A 1.2 V 7-bit 1 GS/s CMOS Flash ADC with Cascaded Voting and Offset Calibration

A 1.23W/mm2 83.7%-Efficiency 400MHz 6-Phase Fully Integrated Buck Converter in 28nm CMOS with On-Chip Capacitor Dynamic Re-Allocation for Inter-Inductor Current Balancing and Fast DVS of 75mV/ns

1.2V 1.6Gb/s 56nm 6F2 4Gb DDR3 SDRAM with hybrid-I/O sense amplifier and segmented sub-array architecture

A 1.2V 30nm 1.6Gb/s/pin 4Gb LPDDR3 SDRAM with input skew calibration and enhanced control scheme

A 1.2V 30nm 3.2Gb/s/pin 4Gb DDR4 SDRAM with dual-error detection and PVT-tolerant data-fetch scheme

1.55-μm DFB lasers over a wide temperature range for analog application

A 1.93-pJ/Bit PCI Express Gen4 PHY Transmitter with On-Chip Supply Regulators in 28 nm CMOS

1. Arterial Stiffness in Masked Hypertension and True Hypertension

1-D free-electron laser model without the slowly-varying approximation

1‐Dehydro‐[10]‐gingerdione from ginger inhibits IKKβ activity for NF‐κB activation and suppresses NF‐κB‐regulated expression of inflammatory genes

1/f Noise Characteristics of AlGaN/GaN FinFETs with and without TMAH surface treatment

1/f Noise characteristics of P-channel tin monoxide thin-film transistors

10-Year Outcomes of Stents Versus Coronary Artery Bypass Grafting for Left Main Coronary Artery Disease

100 cases of endoscopic thyroidectomy: breast approach

1001 GLYCOSYLATED HEMOGLOBIN COULD BE CONSIDERED AS IMPORTANT ROLE IN PROGRESSION OF ARTERIAL STIFFNESS IN HYPERTENSIVE PATIENTS WITHOUT DM

1009 CYANIDIN-3-O-β-D-GLUCOPYRANOSIDE CONCENTRATED MATERIALS FROM MULBERRY FRUIT HAS A POTENCY TO PROTECT ERECTILE FUNCTION BY MINIMIZING OXIDATIVE STRESS IN A RAT MODEL OF DIABETIC ERECTILE DYSFUNCTION

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