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On the effects of hydrogenation of thin film polycrystalline silicon: A key factor to improve heterojunction solar cells

Solar energy materials and solar cells, 2014-03, Vol.122, p.31-39

2014

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Hexagonal Hole Array Patterning for Memory Applications

Journal of Photopolymer Science and Technology, 2015/06/10, Vol.28(5), pp.623-629

2015

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A Thermally Stable and High-Performance 90-nm Al2O3\Cu-Based 1T1R CBRAM Cell

IEEE transactions on electron devices, 2013-11, Vol.60 (11), p.3690-3695

2013

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Readying Directed Self-Assembly for Patterning in Semi-Conductor Manufacturing

Journal of Photopolymer Science and Technology, 2013/12/28, Vol.26(6), pp.779-791

2013

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28 nm pitch of line/space pattern transfer into silicon substrates with chemo-epitaxy Directed Self-Assembly (DSA) process flow

Microelectronic engineering, 2014-07, Vol.123, p.180-186

2014

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A Thermally Stable and High-Performance 90-nm \backslash-Based 1T1R CBRAM Cell

IEEE transactions on electron devices, 2013-11, Vol.60 (11), p.3690-3695

2013

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Insight into Selective Surface Reactions of Dimethylamino-trimethylsilane for Area-Selective Deposition of Metal, Nitride, and Oxide

Journal of physical chemistry. C, 2020-04, Vol.124 (13), p.7163-7173

2020

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Two-Step Plasma-Texturing Process for Multicrystalline Silicon Solar Cells With Linear Microwave Plasma Sources

IEEE journal of photovoltaics, 2013-01, Vol.3 (1), p.152-158

2013

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Study of SF6/N2O Microwave Plasma for Surface Texturing of Multicrystalline (${<}150$ μm) Solar Substrates

Jpn J Appl Phys, 2012-10, Vol.51 (10), p.10NA01-10NA01-6

2012

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CFET SRAM DTCO, Interconnect Guideline, and Benchmark for CMOS Scaling

IEEE transactions on electron devices, 2023-03, Vol.70 (3), p.1-8

2023

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CFET SRAM With Double-Sided Interconnect Design and DTCO Benchmark

IEEE transactions on electron devices, 2023-10, Vol.70 (10), p.1-8

2023

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Conversion of a Patterned Organic Resist into a High Performance Inorganic Hard Mask for High Resolution Pattern Transfer

ACS nano, 2018-11, Vol.12 (11), p.11152-11160

2018

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Defect Mitigation in Area‐Selective Atomic Layer Deposition of Ruthenium on Titanium Nitride/Dielectric Nanopatterns

Advanced materials interfaces, 2019-10, Vol.6 (20), p.n/a

2019

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Buried Power Rail Integration With FinFETs for Ultimate CMOS Scaling

IEEE transactions on electron devices, 2020-12, Vol.67 (12), p.5349-5354

2020

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Dual brush process for selective surface modification in graphoepitaxy directed self-assembly

Journal of micro/nanolithography, MEMS, and MOEMS, 2017-07, Vol.16 (3), p.1

2017

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Implementation of surface energy modification in graphoepitaxy directed self-assembly for hole multiplication

Journal of vacuum science and technology. B, Nanotechnology & microelectronics, 2015-11, Vol.33 (6)

2015

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High-throughput process chain for single electron transistor devices based on field-emission scanning probe lithography and Smart Nanoimprint lithography technology

Journal of vacuum science and technology. B, Nanotechnology & microelectronics, 2019-03, Vol.37 (2)

2019

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Challenges and Solutions of Replacement Metal Gate Patterning to Enable Gate-all-Around Device Scaling

Solid state phenomena, 2021-02, Vol.314, p.119-126

2021

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Integration of a templated directed self-assembly-based hole shrink in a short loop via chain

Journal of micro/nanolithography, MEMS, and MOEMS, 2016-10, Vol.15 (4), p.43505

2016

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On the effects of hydrogenation of thin film polycrystalline silicon: A key factor to improve heterojunction solar cells

Solar energy materials and solar cells, 2014-03, Vol.122, p.31-39

2014

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Study of SF 6 /N 2 O Microwave Plasma for Surface Texturing of Multicrystalline (<150 µm) Solar Substrates

Japanese Journal of Applied Physics, 2012-10, Vol.51 (10S), p.10

2012

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Study of SF 6 /N 2 O Microwave Plasma for Surface Texturing of Multicrystalline (<150 µm) Solar Substrates

Japanese Journal of Applied Physics, 2012-10, Vol.51 (10S), p.10

2012

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Via patterning in the 7-nm node using immersion lithography and graphoepitaxy directed self-assembly

Journal of micro/nanolithography, MEMS, and MOEMS, 2017-04, Vol.16 (2), p.23506

2017

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Influence of template fill in graphoepitaxy directed self-assembly

Journal of micro/nanolithography, MEMS, and MOEMS, 2016-07, Vol.15 (3), p.31603

2016

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Defect mitigation and root cause studies in 14 nm half-pitch chemo-epitaxy directed self-assembly LiNe flow

Journal of micro/nanolithography, MEMS, and MOEMS, 2015-07, Vol.14 (3), p.31204

2015

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On the effects of hydrogenation of thin film polycrystalline silicon: A key factor to improve heterojunction solar cells

Hexagonal Hole Array Patterning for Memory Applications

A Thermally Stable and High-Performance 90-nm Al2O3\Cu-Based 1T1R CBRAM Cell

Readying Directed Self-Assembly for Patterning in Semi-Conductor Manufacturing

28 nm pitch of line/space pattern transfer into silicon substrates with chemo-epitaxy Directed Self-Assembly (DSA) process flow

A Thermally Stable and High-Performance 90-nm \backslash-Based 1T1R CBRAM Cell

Insight into Selective Surface Reactions of Dimethylamino-trimethylsilane for Area-Selective Deposition of Metal, Nitride, and Oxide

Two-Step Plasma-Texturing Process for Multicrystalline Silicon Solar Cells With Linear Microwave Plasma Sources

Study of SF6/N2O Microwave Plasma for Surface Texturing of Multicrystalline (${<}150$ μm) Solar Substrates

CFET SRAM DTCO, Interconnect Guideline, and Benchmark for CMOS Scaling

CFET SRAM With Double-Sided Interconnect Design and DTCO Benchmark

Conversion of a Patterned Organic Resist into a High Performance Inorganic Hard Mask for High Resolution Pattern Transfer

Defect Mitigation in Area‐Selective Atomic Layer Deposition of Ruthenium on Titanium Nitride/Dielectric Nanopatterns

Buried Power Rail Integration With FinFETs for Ultimate CMOS Scaling

Dual brush process for selective surface modification in graphoepitaxy directed self-assembly

Implementation of surface energy modification in graphoepitaxy directed self-assembly for hole multiplication

High-throughput process chain for single electron transistor devices based on field-emission scanning probe lithography and Smart Nanoimprint lithography technology

Challenges and Solutions of Replacement Metal Gate Patterning to Enable Gate-all-Around Device Scaling

Integration of a templated directed self-assembly-based hole shrink in a short loop via chain

On the effects of hydrogenation of thin film polycrystalline silicon: A key factor to improve heterojunction solar cells

Study of SF 6 /N 2 O Microwave Plasma for Surface Texturing of Multicrystalline (<150 µm) Solar Substrates

Study of SF 6 /N 2 O Microwave Plasma for Surface Texturing of Multicrystalline (<150 µm) Solar Substrates

Via patterning in the 7-nm node using immersion lithography and graphoepitaxy directed self-assembly

Influence of template fill in graphoepitaxy directed self-assembly

Defect mitigation and root cause studies in 14 nm half-pitch chemo-epitaxy directed self-assembly LiNe flow

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