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Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 2, 2024, p.862-878

2024

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A scalable FPGA architecture for nonnegative least squares problems

2015 25th International Conference on Field Programmable Logic and Applications (FPL), 2015, p.1-8

2015

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IEEE_Xplore

Towards Property Driven Hardware Security

2016 17th International Workshop on Microprocessor and SOC Test and Verification (MTV), 2016, p.51-56

2016

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IEEE_Xplore

Spector: An OpenCL FPGA benchmark suite

2016 International Conference on Field-Programmable Technology (FPT), 2016, p.141-148

2016

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A streaming clustering approach using a heterogeneous system for big data analysis

2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2017, p.699-706

2017

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IEEE_Xplore

Quantifying timing-based information flow in cryptographic hardware

2015 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2015, p.552-559

2015

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Quantifying Timing-Based Information Flow in Cryptographic Hardware

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015, p.552-559

2015

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Synthesizable Higher-Order Functions for C++

A Brain-Computer Interface (BCI) for the Detection of Mine-Like Objects in Sidescan Sonar Imagery

Sherlock: A Multi-Objective Design Space Exploration Framework

FPGA Architectures for Real-time Dense SLAM

An architecture for learning stream distributions with application to RNG testing

Quantitative Analysis of Timing Channel Security in Cryptographic Hardware Design

Holistic Power Side-Channel Leakage Assessment: Towards a Robust Multidimensional Metric

Adaptive Threshold Non-Pareto Elimination: Re-thinking machine learning for system level design space exploration on FPGAs

iSTELLAR: intermittent Signature aTtenuation Embedded CRYPTO with Low-Level metAl Routing

Statistical Metrics of Hardware Security

Special Session: CAD for Hardware Security - Automation is Key to Adoption of Solutions

A Computational Stack for Cross-Domain Acceleration

Benchmarking Video with the Surgical Image Registration Generator (SIRGn) Baseline

Hiding intermittent information leakage with architectural support for blinking

Composable, parameterizable templates for high-level synthesis

Quantifying hardware security using joint information flow analysis

Pentimento: Data Remanence in Cloud FPGAs

A scalable FPGA architecture for nonnegative least squares problems

Towards Property Driven Hardware Security

Spector: An OpenCL FPGA benchmark suite

A streaming clustering approach using a heterogeneous system for big data analysis

Quantifying timing-based information flow in cryptographic hardware

Quantifying Timing-Based Information Flow in Cryptographic Hardware

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