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25.4 A 20nm 6GB Function-In-Memory DRAM, Based on HBM2 with a 1.2TFLOPS Programmable Computing Unit Using Bank-Level Parallelism, for Machine Learning Applications

2021 IEEE International Solid- State Circuits Conference (ISSCC), 2021, Vol.64, p.350-352

2021

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Mechanical Properties Identification of Sheet Metals by 2D-Digital Image Correlation Method

Procedia engineering, 2017, Vol.184, p.381-389

2017

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A 16Gb LPDDR4X SDRAM with an NBTI-tolerant circuit solution, an SWD PMOS GIDL reduction technique, an adaptive gear-down scheme and a metastable-free DQS aligner in a 10nm class DRAM process

2018 IEEE International Solid - State Circuits Conference - (ISSCC), 2018, p.206-208

2018

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ASIL-D Compliant Battery Monitoring IC with High Measurement Accuracy and Robust Communication

2023 IEEE International Solid- State Circuits Conference (ISSCC), 2023, p.322-324

2023

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A 16Gb 18Gb/S/pin GDDR6 DRAM with per-bit trainable single-ended DFE and PLL-less clocking

2018 IEEE International Solid - State Circuits Conference - (ISSCC), 2018, p.204-206

2018

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A 16Gb/s/pin 8Gb GDDR6 DRAM with bandwidth extension techniques for high-speed applications

2018 IEEE International Solid - State Circuits Conference - (ISSCC), 2018, p.210-212

2018

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Selective-encrypted GIS vector map with low complexity

2015 International Conference on Information Networking (ICOIN), 2015, p.98-103

2015

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Highly Manufacturable 7th Generation 3D NAND Flash Memory with COP structure and Double Stack Process

2021 Symposium on VLSI Technology, 2021, p.1-2

2021

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Current status of Korea heat load test facility for fusion reactor materials

2015 IEEE 26th Symposium on Fusion Engineering (SOFE), 2015, p.1-4

2015

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Thermo-mechanical analysis for the conceptual design of Korean HCCR TBM-set

2015 IEEE 26th Symposium on Fusion Engineering (SOFE), 2015, p.1-4

2015

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Thermal-hydraulic analysis for conceptual design of Korean HCCR TBM-set

2015 IEEE 26th Symposium on Fusion Engineering (SOFE), 2015, p.1-4

2015

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Performance test of a helium circulator for the Helium Cooling System of the HCCR-TBS

2015 IEEE 26th Symposium on Fusion Engineering (SOFE), 2015, p.1-3

2015

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Single reference super-resolution using inter-subband correlation of directional edge

2013 IEEE International Conference on Consumer Electronics (ICCE), 2013, p.157-158

2013

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Corrosion test using ARAA in the experimental loop for a liquid breeder

2015 IEEE 26th Symposium on Fusion Engineering (SOFE), 2015, p.1-5

2015

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Virtual Simulation based Visual Object Tracking via Deep Reinforcement Learning

2022 International Conference on Information Science and Communications Technologies (ICISCT), 2022, p.1-4

2022

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(Invited) Carrier Dynamics and Photon Management for Improvement in Quantum Efficiencies of GaN-Based Visible Light-Emitting Diodes

ECS transactions, 2014, Vol.61 (4), p.109-116

2014

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Computer-Aided Training System of Educational Virtual Dissection Using Visible Korean Human

Lecture notes in computer science, 2006, p.1284-1287

2006

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MR-Tree: A Cache-Conscious Main Memory Spatial Index Structure for Mobile GIS

Lecture notes in computer science, 2005, p.167-180

2005

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Walking Outside the Box: Estimation of Detection Thresholds for Non-Forward Steps

2021 IEEE Virtual Reality and 3D User Interfaces (VR), 2021, p.448-454

2021

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Functional components design and analysis of a Korean HCCR TBM in ITER

2013 IEEE 25th Symposium on Fusion Engineering (SOFE), 2013, p.1-4

2013

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An Efficient Collective Communication Method Using a Shortest Path Algorithm in a Computational Grid

Grid and Cooperative Computing - GCC 2005, 2005, p.250-261

2005

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Thermal-structural analysis considering contact stress between KO HCCR TBM sub-modules for ITER

2013 IEEE 25th Symposium on Fusion Engineering (SOFE), 2013, p.1-4

2013

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Results of the qualification test for ITER blanket first wall small-scale mockups in Korea

2013 IEEE 25th Symposium on Fusion Engineering (SOFE), 2013, p.1-4

2013

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7.2 A 128Gb 3b/cell V-NAND flash memory with 1Gb/s I/O rate

2015 IEEE International Solid State Circuits Conference (ISSCC), 2015, p.1-3

2015

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A 32Gb MLC NAND-flash memory with Vth-endurance-enhancing schemes in 32nm CMOS

2010 IEEE International Solid-State Circuits Conference - (ISSCC), 2010, p.446-447

2010

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25.4 A 20nm 6GB Function-In-Memory DRAM, Based on HBM2 with a 1.2TFLOPS Programmable Computing Unit Using Bank-Level Parallelism, for Machine Learning Applications

Mechanical Properties Identification of Sheet Metals by 2D-Digital Image Correlation Method

A 16Gb LPDDR4X SDRAM with an NBTI-tolerant circuit solution, an SWD PMOS GIDL reduction technique, an adaptive gear-down scheme and a metastable-free DQS aligner in a 10nm class DRAM process

ASIL-D Compliant Battery Monitoring IC with High Measurement Accuracy and Robust Communication

A 16Gb 18Gb/S/pin GDDR6 DRAM with per-bit trainable single-ended DFE and PLL-less clocking

A 16Gb/s/pin 8Gb GDDR6 DRAM with bandwidth extension techniques for high-speed applications

Selective-encrypted GIS vector map with low complexity

Highly Manufacturable 7th Generation 3D NAND Flash Memory with COP structure and Double Stack Process

Current status of Korea heat load test facility for fusion reactor materials

Thermo-mechanical analysis for the conceptual design of Korean HCCR TBM-set

Thermal-hydraulic analysis for conceptual design of Korean HCCR TBM-set

Performance test of a helium circulator for the Helium Cooling System of the HCCR-TBS

Single reference super-resolution using inter-subband correlation of directional edge

Corrosion test using ARAA in the experimental loop for a liquid breeder

Virtual Simulation based Visual Object Tracking via Deep Reinforcement Learning

(Invited) Carrier Dynamics and Photon Management for Improvement in Quantum Efficiencies of GaN-Based Visible Light-Emitting Diodes

Computer-Aided Training System of Educational Virtual Dissection Using Visible Korean Human

MR-Tree: A Cache-Conscious Main Memory Spatial Index Structure for Mobile GIS

Walking Outside the Box: Estimation of Detection Thresholds for Non-Forward Steps

Functional components design and analysis of a Korean HCCR TBM in ITER

An Efficient Collective Communication Method Using a Shortest Path Algorithm in a Computational Grid

Thermal-structural analysis considering contact stress between KO HCCR TBM sub-modules for ITER

Results of the qualification test for ITER blanket first wall small-scale mockups in Korea

7.2 A 128Gb 3b/cell V-NAND flash memory with 1Gb/s I/O rate

A 32Gb MLC NAND-flash memory with Vth-endurance-enhancing schemes in 32nm CMOS

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