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0.01 Cent per Second: Developing a Cloud-based Cost-effective Audio Transcription System for an Online Video Learning Platform

2023 20th International Joint Conference on Computer Science and Software Engineering (JCSSE), 2023, p.432-437

2023

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IEEE_Xplore

A 0.04% BER Strong PUF With Cell-Bias-Based CRPs Filtering and Background Offset Calibration

IEEE transactions on circuits and systems. I, Regular papers, 2020-11, Vol.67 (11), p.3853-3865

2020

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IEEE_Xplore

A 0.05pJ/Pixel 70fps FHD 1Meps Event-Driven Visual Data Processing Unit

2020 IEEE Symposium on VLSI Circuits, 2020, p.1-2

2020

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IEEE_Xplore

A 0.086-mm ^2 12.7-pJ/SOP 64k-Synapse 256-Neuron Online-Learning Digital Spiking Neuromorphic Processor in 28-nm CMOS

IEEE transactions on biomedical circuits and systems, 2019-02, Vol.13 (1), p.145-158

2019

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IEEE_Xplore

A 0.086-mm $^2$ 12.7-pJ/SOP 64k-Synapse 256-Neuron Online-Learning Digital Spiking Neuromorphic Processor in 28nm CMOS

IEEE transactions on biomedical circuits and systems, 2018, p.1-1

2018

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A 0.086-mm[Formula Omitted] 12.7-pJ/SOP 64k-Synapse 256-Neuron Online-Learning Digital Spiking Neuromorphic Processor in 28-nm CMOS

IEEE transactions on biomedical circuits and systems, 2019-02, Vol.13 (1), p.145

2019

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A 0.18µm CMOS narrow-band LNA linearization using digital base-band post-distortion

2010 Conference Record of the Forty Fourth Asilomar Conference on Signals, Systems and Computers, 2010, p.998-1001

2010

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IEEE_Xplore

A 0.21 μJ patient-specific REM/Non-REM sleep classifier for Alzheimer patients

2017 IEEE Biomedical Circuits and Systems Conference (BioCAS), 2017, p.1-4

2017

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A 0.23mW Heterogeneous Deep-Learning Processor Supporting Dynamic Execution of Conditional Neural Networks

ESSCIRC 2018 - IEEE 44th European Solid State Circuits Conference (ESSCIRC), 2018, p.162-165

2018

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IEEE_Xplore

0.3 pJ/Bit Machine Learning Resistant Strong PUF Using Subthreshold Voltage Divider Array

IEEE transactions on circuits and systems. II, Express briefs, 2020-08, Vol.67 (8), p.1394-1398

2020

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IEEE_Xplore

A 0.42V high bandwidth synthesizable parallel access smart memory fabric for computer vision

2017 IEEE International Symposium on Circuits and Systems (ISCAS), 2017, p.1-4

2017

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IEEE_Xplore

A 0.44-μJ/dec, 39.9-μs/dec, Recurrent Attention In-Memory Processor for Keyword Spotting

IEEE journal of solid-state circuits, 2021-07, Vol.56 (7), p.2234-2244

2021

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IEEE_Xplore

A 0.45-1 V Fully-Integrated Distributed Switched Capacitor DC-DC Converter With High Density MIM Capacitor in 22 nm Tri-Gate CMOS

IEEE journal of solid-state circuits, 2014-04, Vol.49 (4), p.917-927

2014

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IEEE_Xplore

A 0.46pJ/bit Ultralow-Power Entropy-Preselection-Based Strong PUF with Worst-Case BER-6

2021 IEEE Asian Solid-State Circuits Conference (A-SSCC), 2021, p.1-3

2021

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A 0.55 V 1.1 mW Artificial Intelligence Processor With On-Chip PVT Compensation for Autonomous Mobile Robots

IEEE transactions on circuits and systems. I, Regular papers, 2018-02, Vol.65 (2), p.567-580

2018

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IEEE_Xplore

A 0.6-107 mu W Energy-Scalable Processor for Directly Analyzing Compressively-Sensed EEG

IEEE transactions on circuits and systems. I, Regular papers, 2014-04, Vol.61 (4), p.1105-1118

2014

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A 0.6-107 µW Energy-Scalable Processor for Directly Analyzing Compressively-Sensed EEG

IEEE transactions on circuits and systems. I, Regular papers, 2014-04, Vol.61 (4), p.1105-1118

2014

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IEEE_Xplore

A 0.61-μJ/Frame Pipelined Wired-logic DNN Processor in 16-nm FPGA Using Convolutional Non-Linear Neural Network

IEEE open journal of circuits and systems, 2022, Vol.3, p.4-14

2022

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A 0.64 mm2 Real-Time Cascade Face Detection Design Based on Reduced Two-Field Extraction

IEEE transactions on very large scale integration (VLSI) systems, 2011, Vol.19 (11), p.1937-1948

2011

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A 0.67-to-5.4 TSOPs/W Spiking Neural Network Accelerator With 128/256 Reconfigurable Neurons and Asynchronous Fully Connected Synapses

IEEE journal of solid-state circuits, 2024-06, p.1-12

2024

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IEEE_Xplore

A 0.76 mm2 0.22 nJ/Pixel DL-Assisted 4K Video Encoder LSI for Quality-of-Experience Over Smartphones

IEEE solid-state circuits letters, 2018-12, Vol.1 (12), p.221-224

2018

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IEEE_Xplore

A 0.76MM2 0.22NJ/Pixel DL-Assisted 4K Video Encoder LSI for Quality-of-Experience Over Smart-Phones

2018 IEEE Symposium on VLSI Circuits, 2018, p.257-258

2018

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IEEE_Xplore

A 0.7mm2 8.54mW FocusNet Display LSI for Power Reduction on OLED Smart-phones

2019 IEEE Asian Solid-State Circuits Conference (A-SSCC), 2019, p.53-56

2019

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A 0.81 mm2 740μW Real-Time Speech Enhancement Processor Using Multiplier-Less PE Arrays for Hearing Aids in 28nm CMOS

2023 IEEE International Solid-State Circuits Conference (ISSCC), 2023, p.21-23

2023

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IEEE_Xplore

A 1.041-Mb/mm2 27.38-TOPS/W Signed-INT8 Dynamic-Logic-Based ADC-less SRAM Compute-in-Memory Macro in 28nm with Reconfigurable Bitwise Operation for AI and Embedded Applications

2022 IEEE International Solid- State Circuits Conference (ISSCC), 2022, Vol.65, p.188-190

2022

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IEEE_Xplore

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0.01 Cent per Second: Developing a Cloud-based Cost-effective Audio Transcription System for an Online Video Learning Platform

A 0.04% BER Strong PUF With Cell-Bias-Based CRPs Filtering and Background Offset Calibration

A 0.05pJ/Pixel 70fps FHD 1Meps Event-Driven Visual Data Processing Unit

A 0.086-mm ^2 12.7-pJ/SOP 64k-Synapse 256-Neuron Online-Learning Digital Spiking Neuromorphic Processor in 28-nm CMOS

A 0.086-mm $^2$ 12.7-pJ/SOP 64k-Synapse 256-Neuron Online-Learning Digital Spiking Neuromorphic Processor in 28nm CMOS

A 0.086-mm[Formula Omitted] 12.7-pJ/SOP 64k-Synapse 256-Neuron Online-Learning Digital Spiking Neuromorphic Processor in 28-nm CMOS

A 0.18µm CMOS narrow-band LNA linearization using digital base-band post-distortion

A 0.21 μJ patient-specific REM/Non-REM sleep classifier for Alzheimer patients

A 0.23mW Heterogeneous Deep-Learning Processor Supporting Dynamic Execution of Conditional Neural Networks

0.3 pJ/Bit Machine Learning Resistant Strong PUF Using Subthreshold Voltage Divider Array

A 0.42V high bandwidth synthesizable parallel access smart memory fabric for computer vision

A 0.44-μJ/dec, 39.9-μs/dec, Recurrent Attention In-Memory Processor for Keyword Spotting

A 0.45-1 V Fully-Integrated Distributed Switched Capacitor DC-DC Converter With High Density MIM Capacitor in 22 nm Tri-Gate CMOS

A 0.46pJ/bit Ultralow-Power Entropy-Preselection-Based Strong PUF with Worst-Case BER-6

A 0.55 V 1.1 mW Artificial Intelligence Processor With On-Chip PVT Compensation for Autonomous Mobile Robots

A 0.6-107 mu W Energy-Scalable Processor for Directly Analyzing Compressively-Sensed EEG

A 0.6-107 µW Energy-Scalable Processor for Directly Analyzing Compressively-Sensed EEG

A 0.61-μJ/Frame Pipelined Wired-logic DNN Processor in 16-nm FPGA Using Convolutional Non-Linear Neural Network

A 0.64 mm2 Real-Time Cascade Face Detection Design Based on Reduced Two-Field Extraction

A 0.67-to-5.4 TSOPs/W Spiking Neural Network Accelerator With 128/256 Reconfigurable Neurons and Asynchronous Fully Connected Synapses

A 0.76 mm2 0.22 nJ/Pixel DL-Assisted 4K Video Encoder LSI for Quality-of-Experience Over Smartphones

A 0.76MM2 0.22NJ/Pixel DL-Assisted 4K Video Encoder LSI for Quality-of-Experience Over Smart-Phones

A 0.7mm2 8.54mW FocusNet Display LSI for Power Reduction on OLED Smart-phones

A 0.81 mm2 740μW Real-Time Speech Enhancement Processor Using Multiplier-Less PE Arrays for Hearing Aids in 28nm CMOS

A 1.041-Mb/mm2 27.38-TOPS/W Signed-INT8 Dynamic-Logic-Based ADC-less SRAM Compute-in-Memory Macro in 28nm with Reconfigurable Bitwise Operation for AI and Embedded Applications

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