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A 0.000261 mm2 Single-Channel 1 GS/s 8-Bit 3-Stage Capacitor Array-Assisted Charge-Injection DAC-Based SAR ADC in 28 nm CMOS

2023 IEEE Asian Solid-State Circuits Conference (A-SSCC), 2023, p.1-3

2023

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A 0.002-mm ^ 6.4-mW 10-Gb/s Full-Rate Direct DFE Receiver With 59.6% Horizontal Eye Opening Under 23.3-dB Channel Loss at Nyquist Frequency

IEEE transactions on microwave theory and techniques, 2014-12, Vol.62 (12), p.3107-3117

2014

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A 0.003 mm2 5.2 mW/tap 20 GBd inductor-less 5-tap analog RX-FFE

2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits), 2016, p.1-2

2016

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A 0.0078mm2 3.4mW Wideband Positive-feedback-Based Noise-Cancelling LNA in 28nm CMOS Exploiting \boldsymbol} Boosting

2022 IEEE International Solid- State Circuits Conference (ISSCC), 2022, Vol.65, p.1-3

2022

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A 0.01-26 GHz single-chip SiGe reflectometer for two-port vector network analyzers

2017 IEEE MTT-S International Microwave Symposium (IMS), 2017, p.1259-1261

2017

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A 0.015-mm2 60-GHz reconfigurable wake-up receiver by reusing multi-stage LNAs

2014 IEEE Asian Solid-State Circuits Conference (A-SSCC), 2014, p.181-184

2014

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A 0.02-to-6GHz SDR balun-LNA using a triple-stage inverter-based amplifier

2012 IEEE International Symposium on Circuits and Systems (ISCAS), 2012, p.472-475

2012

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A 0.03-3GHz Wideband Inductorless Receiver in 65nm CMOS

2021 4th International Conference on Circuits, Systems and Simulation (ICCSS), 2021, p.11-17

2021

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A 0.0375mm2 203.5µW 108.8dB DR DT Single-Loop DSM Audio ADC Using a Single-Ended Ring-Amplifier-Based Integrator in 180nm CMOS

2022 IEEE International Solid- State Circuits Conference (ISSCC), 2022, Vol.65, p.412-414

2022

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A 0.038-mm2 SAW-Less Multiband Transceiver Using an N-Path SC Gain Loop

IEEE journal of solid-state circuits, 2017-08, Vol.52 (8), p.2055-2070

2017

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A 0.05-6 GHz voltage-mode harmonic rejection mixer with up to 30 dBm in-band IIP3 and 35 dBc HRR in 32 nm SOI CMOS

2017 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 2017, p.304-307

2017

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A 0.06–3.4-MHz 92-[Formula Omitted]W Analog FIR Channel Selection Filter With Very Sharp Transition Band for IoT Receivers

IEEE solid-state circuits letters, 2019-01, Vol.2 (9), p.171

2019

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A 0.06-3.4-MHz 92- \mu W Analog FIR Channel Selection Filter With Very Sharp Transition Band for IoT Receivers

IEEE solid-state circuits letters, 2019-09, Vol.2 (9), p.171-174

2019

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A 0.06-3.4-MHz 92-μW Analog FIR Channel Selection Filter With Very Sharp Transition Band for IoT Receivers

ESSCIRC 2019 - IEEE 45th European Solid State Circuits Conference (ESSCIRC), 2019, p.171-174

2019

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A 0.061 nJ/b 10 Mbps Hybrid BF-PSK Receiver for Internet of Things Applications

IEEE transactions on circuits and systems. I, Regular papers, 2022-05, Vol.69 (5), p.1919-1931

2022

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A 0.061-pJ/b/dB 28-Gb/s Gradient-Based Maximum Eye Tracking CDR with 2-Tap DFE Adaptation in 28-nm CMOS

IEEE transactions on circuits and systems. II, Express briefs, 2023-11, Vol.70 (11), p.1-1

2023

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A 0.07–3 GHz wideband front-end for SDR receiver with 2.3 dB NF and 12 dBm IIP3 in 65 nm CMOS

IEICE Electronics Express, 2019, Vol.16 (4), p.20181089-20181089

2019

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A 0.07 mm[Formula Omitted] Asynchronous Logic CMOS Pulsed Receiver Based on Radio Events Self-Synchronization

IEEE transactions on circuits and systems. I, Regular papers, 2014-03, Vol.61 (3), p.750

2014

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A 0.07 mm ^2 Asynchronous Logic CMOS Pulsed Receiver Based on Radio Events Self-Synchronization

IEEE transactions on circuits and systems. I, Regular papers, 2014-03, Vol.61 (3), p.750-763

2014

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A 0.08-3GHz high gain UWB LNA with improved flatness

2013 International Workshop on Microwave and Millimeter Wave Circuits and System Technology, 2013, p.411-414

2013

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A 0.084 nJ/b FSK transmitter and 4.8 μW OOK receiver for ISM-band medical sensor networks

2013 IEEE 11th International New Circuits and Systems Conference (NEWCAS), 2013, p.1-4

2013

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A 0.08mm2 1-6.2 GHz Receiver Front-End with Inverter-Based Shunt-Feedback Balun-LNA

2020 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 2020, p.379-382

2020

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A 0.1-0.95 GHz Full-Duplex Receiver With < 1 dB NF Degradation Using a Passive Continuous-Mode Charge-Sharing Vector Modulator

IEEE transactions on microwave theory and techniques, 2019-07, Vol.67 (7), p.3042-3052

2019

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A 0.1-1.5 GHz Harmonic Rejection Receiver Front-End With Phase Ambiguity Correction, Vector Gain Calibration and Blocker-Resilient TIA

IEEE transactions on circuits and systems. I, Regular papers, 2015-04, Vol.62 (4), p.1005-1014

2015

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A 0.1-1.5GHz harmonic rejection receiver front-end with hybrid 8 phase LO generator, phase ambiguity correction and vector gain calibration

2014 IEEE Asian Solid-State Circuits Conference (A-SSCC), 2014, p.353-356

2014

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1 – 25 von 162.980

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A 0.000261 mm2 Single-Channel 1 GS/s 8-Bit 3-Stage Capacitor Array-Assisted Charge-Injection DAC-Based SAR ADC in 28 nm CMOS

A 0.002-mm ^ 6.4-mW 10-Gb/s Full-Rate Direct DFE Receiver With 59.6% Horizontal Eye Opening Under 23.3-dB Channel Loss at Nyquist Frequency

A 0.003 mm2 5.2 mW/tap 20 GBd inductor-less 5-tap analog RX-FFE

A 0.0078mm2 3.4mW Wideband Positive-feedback-Based Noise-Cancelling LNA in 28nm CMOS Exploiting \boldsymbol} Boosting

A 0.01-26 GHz single-chip SiGe reflectometer for two-port vector network analyzers

A 0.015-mm2 60-GHz reconfigurable wake-up receiver by reusing multi-stage LNAs

A 0.02-to-6GHz SDR balun-LNA using a triple-stage inverter-based amplifier

A 0.03-3GHz Wideband Inductorless Receiver in 65nm CMOS

A 0.0375mm2 203.5µW 108.8dB DR DT Single-Loop DSM Audio ADC Using a Single-Ended Ring-Amplifier-Based Integrator in 180nm CMOS

A 0.038-mm2 SAW-Less Multiband Transceiver Using an N-Path SC Gain Loop

A 0.05-6 GHz voltage-mode harmonic rejection mixer with up to 30 dBm in-band IIP3 and 35 dBc HRR in 32 nm SOI CMOS

A 0.06–3.4-MHz 92-[Formula Omitted]W Analog FIR Channel Selection Filter With Very Sharp Transition Band for IoT Receivers

A 0.06-3.4-MHz 92- \mu W Analog FIR Channel Selection Filter With Very Sharp Transition Band for IoT Receivers

A 0.06-3.4-MHz 92-μW Analog FIR Channel Selection Filter With Very Sharp Transition Band for IoT Receivers

A 0.061 nJ/b 10 Mbps Hybrid BF-PSK Receiver for Internet of Things Applications

A 0.061-pJ/b/dB 28-Gb/s Gradient-Based Maximum Eye Tracking CDR with 2-Tap DFE Adaptation in 28-nm CMOS

A 0.07–3 GHz wideband front-end for SDR receiver with 2.3 dB NF and 12 dBm IIP3 in 65 nm CMOS

A 0.07 mm[Formula Omitted] Asynchronous Logic CMOS Pulsed Receiver Based on Radio Events Self-Synchronization

A 0.07 mm ^2 Asynchronous Logic CMOS Pulsed Receiver Based on Radio Events Self-Synchronization

A 0.08-3GHz high gain UWB LNA with improved flatness

A 0.084 nJ/b FSK transmitter and 4.8 μW OOK receiver for ISM-band medical sensor networks

A 0.08mm2 1-6.2 GHz Receiver Front-End with Inverter-Based Shunt-Feedback Balun-LNA

A 0.1-0.95 GHz Full-Duplex Receiver With < 1 dB NF Degradation Using a Passive Continuous-Mode Charge-Sharing Vector Modulator

A 0.1-1.5 GHz Harmonic Rejection Receiver Front-End With Phase Ambiguity Correction, Vector Gain Calibration and Blocker-Resilient TIA

A 0.1-1.5GHz harmonic rejection receiver front-end with hybrid 8 phase LO generator, phase ambiguity correction and vector gain calibration

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