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A 0.09-pJ/b/dB 28-Gb/s Digital CDR With ISI-Resistant Phase Detector

IEEE transactions on circuits and systems. II, Express briefs, 2024-08, p.1-1

2024

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A 0.1-0.3 V 40-123 fJ/bit/ch On-Chip Data Link With ISI-Suppressed Bootstrapped Repeaters

IEEE journal of solid-state circuits, 2012-05, Vol.47 (5), p.1242-1251

2012

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0–1 Laws

Finite Model Theory, p.71-96

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0-1 Laws

Finite Model Theory, p.71-93

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0–1 Laws for Fragments of Existential Second-Order Logic: A Survey

Lecture notes in computer science, 2000, p.84-98

2000

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A 0.13-μm CMOS 5-Gb/s 10-m 28AWG cable transceiver with no-feedback-loop continuous-time post-equalizer

IEEE journal of solid-state circuits, 2003-05, Vol.38 (5), p.741-746

2003

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A 0.13μm GaAs HEMT Reconfigurable Balance-to-Doherty Stacked Power Amplifier for 5G mm-wave Applications

2023 18th Conference on Ph.D Research in Microelectronics and Electronics (PRIME), 2023, p.1-4

2023

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A 0.15-μs/V Buck-Boost Symbol-Power-Tracking Supply Modulator With Dual Auxiliary Current Paths and EPP Scheme for 5G NR Power Amplifiers

IEEE transactions on circuits and systems. I, Regular papers, 2023-11, Vol.70 (11), p.4660-4670

2023

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A 0.18-μm CMOS front-end processor for a Blu-Ray Disc recorder with an adaptive PRML

IEEE journal of solid-state circuits, 2005, Vol.40 (1), p.342-350

2005

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A 0.18-/spl mu/m CMOS front-end processor for a Blu-Ray Disc recorder with an adaptive PRML

IEEE journal of solid-state circuits, 2005-01, Vol.40 (1), p.342-350

2005

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A 0.24+0.18 M⊙ double-lined eclipsing binary from the HATSouth survey

Monthly notices of the Royal Astronomical Society, 2015-08, Vol.451 (3), p.2263-2277

2015

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A 0.392ms FPGA-Based Channel Estimation Design Implementing Fine Symbol Timing Offset and Residual Carrier Frequency Offset Cancellation for 2×4 MIMO Uplink in 5G Microcells

2024 IEEE/SICE International Symposium on System Integration (SII), 2024, p.1158-1163

2024

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A 0.4-μm CMOS 10-Gb/s 4-PAM pre-emphasis serial link transmitter

IEEE journal of solid-state circuits, 1999-05, Vol.34 (5), p.580-585

1999

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A 0.5 (half) overconvergent Eichler-Shimura isomorphism

Annales mathématiques du Québec, 2016-06, Vol.40 (1), p.121-148

2016

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A 0.65-to-1.4 nJ/Burst 3-to-10 GHz UWB All-Digital TX in 90 nm CMOS for IEEE 802.15.4a

IEEE journal of solid-state circuits, 2007-12, Vol.42 (12), p.2860-2869

2007

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1,000 Symbols: What Shapes Mean in Art and Myth

Reference Reviews, 2003, Vol.17 (1), p.33-33

Brown, Bronwen

2003

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1,000 Symbols: What Shapes Mean in Art and Myth

Science News, 2002, Vol.162 (5), p.79

Goldberg, Cait

2002

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A 1.02-pJ/b 20.83-Gb/s/Wire USR Transceiver Using CNRZ-5 in 16-nm FinFET

IEEE journal of solid-state circuits, 2020-04, Vol.55 (4), p.1108-1123

2020

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1.02Tb/s CPRI-Equivalent Rate Direct Detection Transmission Supporting 1024-QAM Using IQ Interleaved Digital-Analog Radio-over-Fiber for Mobile Fronthaul

2022 Asia Communications and Photonics Conference (ACP), 2022, p.688-692

2022

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A 1.1-pJ/b 8-to-16-Gb/s Receiver With Stochastic CTLE Adaptation

IEEE transactions on circuits and systems. II, Express briefs, 2023-02, Vol.70 (2), p.381-385

2023

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1. 1923–1926

Emil Artin and Helmut Hasse, p.47-104

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1.28 Tbit/s single-polarisation serial OOK optical data generation and demultiplexing

Electronics letters, 2009-02, Vol.45 (5), p.1-1

2009

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1, 4, 8: 9, 7. MONEY: THE PRESENCE OF THE DEAD AND A MEASURE OF TIME

Homme, 1970-01, Vol.10 (1), p.17-39

DE COPPET, DANIEL

1970

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1,600-year-old mysterious symbols cracked

Beijing review, 2002-10, Vol.45 (44), p.28

2002

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A 1.8 V 25 Mbps CMOS single-phase, phase-locked loop-based BPSK, QPSK demodulator

International journal of electrical and computer engineering (Malacca, Malacca), 2023-12, Vol.13 (6), p.6102

2023

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A 0.09-pJ/b/dB 28-Gb/s Digital CDR With ISI-Resistant Phase Detector

A 0.1-0.3 V 40-123 fJ/bit/ch On-Chip Data Link With ISI-Suppressed Bootstrapped Repeaters

0–1 Laws

0-1 Laws

0–1 Laws for Fragments of Existential Second-Order Logic: A Survey

A 0.13-μm CMOS 5-Gb/s 10-m 28AWG cable transceiver with no-feedback-loop continuous-time post-equalizer

A 0.13μm GaAs HEMT Reconfigurable Balance-to-Doherty Stacked Power Amplifier for 5G mm-wave Applications

A 0.15-μs/V Buck-Boost Symbol-Power-Tracking Supply Modulator With Dual Auxiliary Current Paths and EPP Scheme for 5G NR Power Amplifiers

A 0.18-μm CMOS front-end processor for a Blu-Ray Disc recorder with an adaptive PRML

A 0.18-/spl mu/m CMOS front-end processor for a Blu-Ray Disc recorder with an adaptive PRML

A 0.24+0.18 M⊙ double-lined eclipsing binary from the HATSouth survey

A 0.392ms FPGA-Based Channel Estimation Design Implementing Fine Symbol Timing Offset and Residual Carrier Frequency Offset Cancellation for 2×4 MIMO Uplink in 5G Microcells

A 0.4-μm CMOS 10-Gb/s 4-PAM pre-emphasis serial link transmitter

A 0.5 (half) overconvergent Eichler-Shimura isomorphism

A 0.65-to-1.4 nJ/Burst 3-to-10 GHz UWB All-Digital TX in 90 nm CMOS for IEEE 802.15.4a

1,000 Symbols: What Shapes Mean in Art and Myth

1,000 Symbols: What Shapes Mean in Art and Myth

A 1.02-pJ/b 20.83-Gb/s/Wire USR Transceiver Using CNRZ-5 in 16-nm FinFET

1.02Tb/s CPRI-Equivalent Rate Direct Detection Transmission Supporting 1024-QAM Using IQ Interleaved Digital-Analog Radio-over-Fiber for Mobile Fronthaul

A 1.1-pJ/b 8-to-16-Gb/s Receiver With Stochastic CTLE Adaptation

1. 1923–1926

1.28 Tbit/s single-polarisation serial OOK optical data generation and demultiplexing

1, 4, 8: 9, 7. MONEY: THE PRESENCE OF THE DEAD AND A MEASURE OF TIME

1,600-year-old mysterious symbols cracked

A 1.8 V 25 Mbps CMOS single-phase, phase-locked loop-based BPSK, QPSK demodulator

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