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An architecture-level analysis on deep learning models for low-impact computations

The Artificial intelligence review, 2023-03, Vol.56 (3), p.1971-2010

2023

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The reach profiler (REAPER): Enabling the mitigation of DRAM retention failures via profiling at aggressive conditions

2017 ACM/IEEE 44th Annual International Symposium on Computer Architecture (ISCA), 2017, p.255-268

2017

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Global Mittag-Leffler stability and synchronization of memristor-based fractional-order neural networks

Neural networks, 2014-03, Vol.51, p.1-8

2014

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Experimental demonstration of associative memory with memristive neural networks

Neural networks, 2010-09, Vol.23 (7), p.881-886

2010

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Memristor Bridge Synapse-Based Neural Network and Its Learning

IEEE transaction on neural networks and learning systems, 2012-09, Vol.23 (9), p.1426-1435

2012

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IC9600: A Benchmark Dataset for Automatic Image Complexity Assessment

IEEE transactions on pattern analysis and machine intelligence, 2023-07, Vol.45 (7), p.8577-8593

2023

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Global exponential dissipativity and stabilization of memristor-based recurrent neural networks with time-varying delays

Neural networks, 2013-12, Vol.48, p.158-172

2013

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Attractivity Analysis of Memristor-Based Cellular Neural Networks With Time-Varying Delays

IEEE transaction on neural networks and learning systems, 2014-04, Vol.25 (4), p.704-717

2014

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IEEE_Xplore

Low-Voltage Low-Power Integrable CMOS Circuit Implementation of Integer- and Fractional-Order FitzHugh-Nagumo Neuron Model

IEEE transaction on neural networks and learning systems, 2019-07, Vol.30 (7), p.2108-2122

2019

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Lagrange Stability of Memristive Neural Networks With Discrete and Distributed Delays

IEEE transaction on neural networks and learning systems, 2014-04, Vol.25 (4), p.690-703

2014

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Synchronization of memristor-based recurrent neural networks with two delay components based on second-order reciprocally convex approach

Neural networks, 2014-09, Vol.57, p.79-93

2014

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Sign-magnitude SC: getting 10X accuracy for free in stochastic computing for deep neural networks

Proceedings of the 55th Annual Design Automation Conference, 2018, p.1-6

2018

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Neural Learning Circuits Utilizing Nano-Crystalline Silicon Transistors and Memristors

IEEE transaction on neural networks and learning systems, 2012-04, Vol.23 (4), p.565-573

2012

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Trustworthy Genetic Programming-Based Synthesis of Analog Circuit Topologies Using Hierarchical Domain-Specific Building Blocks

IEEE transactions on evolutionary computation, 2011-08, Vol.15 (4), p.557-570

2011

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IEEE_Xplore

Synchronization control of memristor-based recurrent neural networks with perturbations

Neural networks, 2014-05, Vol.53, p.8-14

2014

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Microscale Searching Algorithm for Coupling Matrix Optimization of Automated Microwave Filter Tuning

IEEE transactions on cybernetics, 2023-05, Vol.53 (5), p.2829-2840

2023

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IEEE_Xplore

SAPredictor: a simple and accurate self-adaptive predictor for hierarchical hybrid memory system

Proceedings of the 59th ACM/IEEE Design Automation Conference, 2022, p.835-840

2022

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Improving LUT-based optimization for ASICs

Proceedings of the 59th ACM/IEEE Design Automation Conference, 2022, p.421-426

2022

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Passivity and passification of memristor-based complex-valued recurrent neural networks with interval time-varying delays

Neurocomputing (Amsterdam), 2014-11, Vol.144, p.391-407

2014

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A generalized hardware architecture for real-time spiking neural networks

Neural computing & applications, 2023-08, Vol.35 (24), p.17821-17835

2023

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ASIC Implementation of a Nonlinear Dynamical Model for Hippocampal Prosthesis

Neural computation, 2018-09, Vol.30 (9), p.2472-2499

2018

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Performance Evaluation of Evolutionary Algorithms for Optimal Filter Design

IEEE transactions on evolutionary computation, 2012-02, Vol.16 (1), p.135-147

2012

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IEEE_Xplore

Exponential stability of stochastic memristor-based recurrent neural networks with time-varying delays

Neurocomputing (Amsterdam), 2014-08, Vol.138, p.92-98

2014

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Design of controller on synchronization of memristor-based neural networks with time-varying delays

Neurocomputing (Amsterdam), 2015-01, Vol.147, p.372-379

2015

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Architecting DDR5 DRAM caches for non-volatile memory systems

Proceedings of the 59th ACM/IEEE Design Automation Conference, 2022, p.1057-1062

2022

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An architecture-level analysis on deep learning models for low-impact computations

The reach profiler (REAPER): Enabling the mitigation of DRAM retention failures via profiling at aggressive conditions

Global Mittag-Leffler stability and synchronization of memristor-based fractional-order neural networks

Experimental demonstration of associative memory with memristive neural networks

Memristor Bridge Synapse-Based Neural Network and Its Learning

IC9600: A Benchmark Dataset for Automatic Image Complexity Assessment

Global exponential dissipativity and stabilization of memristor-based recurrent neural networks with time-varying delays

Attractivity Analysis of Memristor-Based Cellular Neural Networks With Time-Varying Delays

Low-Voltage Low-Power Integrable CMOS Circuit Implementation of Integer- and Fractional-Order FitzHugh-Nagumo Neuron Model

Lagrange Stability of Memristive Neural Networks With Discrete and Distributed Delays

Synchronization of memristor-based recurrent neural networks with two delay components based on second-order reciprocally convex approach

Sign-magnitude SC: getting 10X accuracy for free in stochastic computing for deep neural networks

Neural Learning Circuits Utilizing Nano-Crystalline Silicon Transistors and Memristors

Trustworthy Genetic Programming-Based Synthesis of Analog Circuit Topologies Using Hierarchical Domain-Specific Building Blocks

Synchronization control of memristor-based recurrent neural networks with perturbations

Microscale Searching Algorithm for Coupling Matrix Optimization of Automated Microwave Filter Tuning

SAPredictor: a simple and accurate self-adaptive predictor for hierarchical hybrid memory system

Improving LUT-based optimization for ASICs

Passivity and passification of memristor-based complex-valued recurrent neural networks with interval time-varying delays

A generalized hardware architecture for real-time spiking neural networks

ASIC Implementation of a Nonlinear Dynamical Model for Hippocampal Prosthesis

Performance Evaluation of Evolutionary Algorithms for Optimal Filter Design

Exponential stability of stochastic memristor-based recurrent neural networks with time-varying delays

Design of controller on synchronization of memristor-based neural networks with time-varying delays

Architecting DDR5 DRAM caches for non-volatile memory systems

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