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A clock feedthrough reduction circuit for switched-current systems

IEEE journal of solid-state circuits, 1993-02, Vol.28 (2), p.133-137

1993

Volltextzugriff (PDF)

A CMOS dual-band fractional-n synthesizer with reference doubler and compensated charge pump

2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519), 2004, p.100-516 Vol.1

First edition, 2004

Volltextzugriff (PDF)

A new waveform-reshaping circuit: an alternative approach to Schmitt trigger

IEEE journal of solid-state circuits, 1993-02, Vol.28 (2), p.162-164

1993

Volltextzugriff (PDF)

A 20-GHZ phase-locked loop for 40-Gb/s serializing transmitter in 0.13-μm CMOS

IEEE journal of solid-state circuits, 2006-04, Vol.41 (4), p.899-908

2006

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An efficient global motion characterization method for image processing applications

IEEE transactions on consumer electronics, 1997-11, Vol.43 (4), p.1010-1018

1997

Volltextzugriff (PDF)

Comparison frequency doubling and charge pump matching techniques for dual-band ΔΣ fractional-N frequency synthesizer

IEEE journal of solid-state circuits, 2005-11, Vol.40 (11), p.2228-2236

2005

Volltextzugriff (PDF)

Class-AB large-swing CMOS buffer amplifier with controlled bias current

IEEE journal of solid-state circuits, 1993-12, Vol.28 (12), p.1350-1353

1993

Volltextzugriff (PDF)

A static power saving TTL-to-CMOS input buffer

IEEE journal of solid-state circuits, 1995-05, Vol.30 (5), p.616-620

1995

Volltextzugriff (PDF)

A single chip Δ-Σ ADC with a built-in variable gain stage and DAC with a charge integrating subconverter for a 5 V 9600-b/s modem

IEEE journal of solid-state circuits, 1995-08, Vol.30 (8), p.940-943

1995

Volltextzugriff (PDF)

A 0.25-μm CMOS 1.9-GHz PHS RF transceiver with a 150-kHz low-IF architecture

IEEE journal of solid-state circuits, 2007-06, Vol.42 (6), p.1318-1327

2007

Volltextzugriff (PDF)

A 1.2-V-only 900-mW 10 gb ethernet transceiver and XAUI interface with robust VCO tuning technique

IEEE journal of solid-state circuits, 2005-11, Vol.40 (11), p.2148-2158

2005

Volltextzugriff (PDF)

A fuzzy-control processor for automatic focusing

IEEE transactions on consumer electronics, 1994-05, Vol.40 (2), p.138-144

1994

Volltextzugriff (PDF)

A real-time identification method on motion and out-of focus blur for a video camera

IEEE transactions on consumer electronics, 1994-05, Vol.40 (2), p.145-153

1994

Volltextzugriff (PDF)

Selective low-pressure silicon epitaxy for MOS and bipolar transistor application

IEEE transactions on electron devices, 1983-11, Vol.30 (11), p.1511-1515

1983

Volltextzugriff (PDF)

An experimental high-density DRAM cell with a built-in gain stage: The 1993 European solid-state circuits conference

IEEE journal of solid-state circuits, 1994, Vol.29 (8), p.978-981

1994

Volltextzugriff (PDF)

A fully integrated 0.13μm CMOS 10Gb ethernet transceiver with XAUI interface

First edition, 2004

Volltextzugriff (PDF)

Design techniques for high speed serial data transmitters in CMOS process

Electrical engineering, 1996-04, Vol.79 (2), p.113-117

1996

Volltextzugriff (PDF)

Real Time Face Detection and Recognition System Using Haar-Like Feature/HMM in Ubiquitous Network Environments

Computational Science and Its Applications – ICCSA 2005, 2005, p.1154-1161

2005

Volltextzugriff (PDF)

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A clock feedthrough reduction circuit for switched-current systems

A CMOS dual-band fractional-n synthesizer with reference doubler and compensated charge pump

A new waveform-reshaping circuit: an alternative approach to Schmitt trigger

A 20-GHZ phase-locked loop for 40-Gb/s serializing transmitter in 0.13-μm CMOS

An efficient global motion characterization method for image processing applications

Comparison frequency doubling and charge pump matching techniques for dual-band ΔΣ fractional-N frequency synthesizer

Class-AB large-swing CMOS buffer amplifier with controlled bias current

A static power saving TTL-to-CMOS input buffer

A single chip Δ-Σ ADC with a built-in variable gain stage and DAC with a charge integrating subconverter for a 5 V 9600-b/s modem

A 0.25-μm CMOS 1.9-GHz PHS RF transceiver with a 150-kHz low-IF architecture

A 1.2-V-only 900-mW 10 gb ethernet transceiver and XAUI interface with robust VCO tuning technique

A fuzzy-control processor for automatic focusing

A real-time identification method on motion and out-of focus blur for a video camera

Selective low-pressure silicon epitaxy for MOS and bipolar transistor application

An experimental high-density DRAM cell with a built-in gain stage: The 1993 European solid-state circuits conference

A fully integrated 0.13μm CMOS 10Gb ethernet transceiver with XAUI interface

Design techniques for high speed serial data transmitters in CMOS process

Real Time Face Detection and Recognition System Using Haar-Like Feature/HMM in Ubiquitous Network Environments

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