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A Platform Solution for Secure Supply-Chain and Chip Life-Cycle Management

Computer (Long Beach, Calif.), 2016-08, Vol.49 (8), p.28-34

2016

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Cool Chips Ad

Computer (Long Beach, Calif.), 2011-11, Vol.44 (11), p.c3-c3

Anon., Anon

2011

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A Three-Dimensional Arrayed Microfluidic Blood–Brain Barrier Model With Integrated Electrical Sensor Array

IEEE transactions on biomedical engineering, 2018-02, Vol.65 (2), p.431-439

2018

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Cool Chips Ad

Computer (Long Beach, Calif.), 2009-11, Vol.42 (11), p.19-19

Anon., Anon

2009

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Wafer-Level Integration of an Advanced Logic-Memory System Through the Second-Generation CoWoS Technology

IEEE transactions on electron devices, 2017-10, Vol.64 (10), p.4071-4077

2017

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Outstanding Research Problems in NoC Design: System, Microarchitecture, and Circuit Perspectives

IEEE transactions on computer-aided design of integrated circuits and systems, 2009-01, Vol.28 (1), p.3-21

2009

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System-on-Chip: Reuse and Integration

Proceedings of the IEEE, 2006, Vol.94 (6), p.1050-1069

2006

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Opamp-Less Sub-μW/Channel Δ-Modulated Neural-ADC With Super-GΩ Input Impedance

IEEE journal of solid-state circuits, 2021-05, Vol.56 (5), p.1565-1575

2021

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Flexible and Efficient QoS Provisioning in AXI4-Based Network-on-Chip Architecture

IEEE transactions on computer-aided design of integrated circuits and systems, 2022-05, Vol.41 (5), p.1523-1536

2022

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Vertical GaN MISFET for chip-on-chip high speed laser driving applications

Electronics letters, 2020-09, Vol.56 (20), p.1084-1086

2020

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A novel buffering fault‐tolerance approach for network on chip (NoC)

IET circuits, devices & systems, 2023-07, Vol.17 (4), p.250-257

2023

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Amdahl's Law in the Multicore Era

Computer (Long Beach, Calif.), 2008-07, Vol.41 (7), p.33-38

2008

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Photonic Networks-on-Chip for Future Generations of Chip Multiprocessors

IEEE transactions on computers, 2008-09, Vol.57 (9), p.1246-1260

2008

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Power-Up SRAM State as an Identifying Fingerprint and Source of True Random Numbers

IEEE transactions on computers, 2009-09, Vol.58 (9), p.1198-1210

2009

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Flipping bits in memory without accessing them: An experimental study of DRAM disturbance errors

2014 ACM/IEEE 41st International Symposium on Computer Architecture (ISCA), 2014, p.361-372

2014

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Research Challenges for On-Chip Interconnection Networks

IEEE MICRO, 2007-09, Vol.27 (5), p.96-108

2007

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An Efficient Deep-Learning-Based Super-Resolution Accelerating SoC With Heterogeneous Accelerating and Hierarchical Cache

IEEE journal of solid-state circuits, 2023-03, Vol.58 (3), p.614-623

2023

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On-Chip Integration of III-Nitride Flip-Chip Light-Emitting Diodes With Photodetectors

Journal of lightwave technology, 2021-04, Vol.39 (8), p.2603-2608

2021

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NeuronLink: An Efficient Chip-to-Chip Interconnect for Large-Scale Neural Network Accelerators

IEEE transactions on very large scale integration (VLSI) systems, 2020-09, Vol.28 (9), p.1966-1978

2020

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Flexible CMOS chip converted by a novel chip transformation process

Electronics letters, 2020-11, Vol.56 (24), p.1335-1337

2020

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Multimode W-Band and D-Band MIMO Scalable Radar Platform

IEEE transactions on microwave theory and techniques, 2021-01, Vol.69 (1), p.1036-1047

2021

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High-Gain and High-Efficiency Sub-Terahertz Antenna-on-Chip With Microbumps for Highly-Integrated Systems

IEEE transactions on antennas and propagation, 2024-05, Vol.72 (5), p.4107-4115

2024

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OrthoNoC: A Broadcast-Oriented Dual-Plane Wireless Network-on-Chip Architecture

IEEE transactions on parallel and distributed systems, 2018-03, Vol.29 (3), p.628-641

2018

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Resource Management for Improving Soft-Error and Lifetime Reliability of Real-Time MPSoCs

IEEE transactions on computer-aided design of integrated circuits and systems, 2019-12, Vol.38 (12), p.2215-2228

2019

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Optics in Computing: From Photonic Network-on-Chip to Chip-to-Chip Interconnects and Disintegrated Architectures

Journal of lightwave technology, 2019-01, Vol.37 (2), p.363-379

2019

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A Platform Solution for Secure Supply-Chain and Chip Life-Cycle Management

Cool Chips Ad

A Three-Dimensional Arrayed Microfluidic Blood–Brain Barrier Model With Integrated Electrical Sensor Array

Cool Chips Ad

Wafer-Level Integration of an Advanced Logic-Memory System Through the Second-Generation CoWoS Technology

Outstanding Research Problems in NoC Design: System, Microarchitecture, and Circuit Perspectives

System-on-Chip: Reuse and Integration

Opamp-Less Sub-μW/Channel Δ-Modulated Neural-ADC With Super-GΩ Input Impedance

Flexible and Efficient QoS Provisioning in AXI4-Based Network-on-Chip Architecture

Vertical GaN MISFET for chip-on-chip high speed laser driving applications

A novel buffering fault‐tolerance approach for network on chip (NoC)

Amdahl's Law in the Multicore Era

Photonic Networks-on-Chip for Future Generations of Chip Multiprocessors

Power-Up SRAM State as an Identifying Fingerprint and Source of True Random Numbers

Flipping bits in memory without accessing them: An experimental study of DRAM disturbance errors

Research Challenges for On-Chip Interconnection Networks

An Efficient Deep-Learning-Based Super-Resolution Accelerating SoC With Heterogeneous Accelerating and Hierarchical Cache

On-Chip Integration of III-Nitride Flip-Chip Light-Emitting Diodes With Photodetectors

NeuronLink: An Efficient Chip-to-Chip Interconnect for Large-Scale Neural Network Accelerators

Flexible CMOS chip converted by a novel chip transformation process

Multimode W-Band and D-Band MIMO Scalable Radar Platform

High-Gain and High-Efficiency Sub-Terahertz Antenna-on-Chip With Microbumps for Highly-Integrated Systems

OrthoNoC: A Broadcast-Oriented Dual-Plane Wireless Network-on-Chip Architecture

Resource Management for Improving Soft-Error and Lifetime Reliability of Real-Time MPSoCs

Optics in Computing: From Photonic Network-on-Chip to Chip-to-Chip Interconnects and Disintegrated Architectures

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