Details

Autor(en) / Beteiligte

• Ye, Yangsen
• He, Tan
• Huang, He-Liang
• Wei, Zuolin
• Zhang, Yiming
• Zhao, Youwei
• Wu, Dachao
• Zhu, Qingling
• Guan, Huijie
• Cao, Sirui
• Chen, Fusheng
• Chung, Tung-Hsun
• Deng, Hui
• Fan, Daojin
• Gong, Ming
• Guo, Cheng
• Guo, Shaojun
• Han, Lianchen
• Li, Na
• Li, Shaowei
• Li, Yuan
• Liang, Futian
• Lin, Jin
• Qian, Haoran
• Rong, Hao
• Su, Hong
• Wang, Shiyu
• Wu, Yulin
• Xu, Yu
• Ying, Chong
• Yu, Jiale
• Zha, Chen
• Zhang, Kaili
• Huo, Yong-Heng
• Lu, Chao-Yang
• Peng, Cheng-Zhi
• Zhu, Xiaobo
• Pan, Jian-Wei

Titel

Logical Magic State Preparation with Fidelity beyond the Distillation Threshold on a Superconducting Quantum Processor

Ist Teil von

• Physical review letters, 2023-11, Vol.131 (21), p.210603-210603, Article 210603

Ort / Verlag

United States

Erscheinungsjahr

2023

Quelle

American Physical Society Journals

Beschreibungen/Notizen

• Fault-tolerant quantum computing based on surface code has emerged as an attractive candidate for practical large-scale quantum computers to achieve robust noise resistance. To achieve universality, magic states preparation is a commonly approach for introducing non-Clifford gates. Here, we present a hardware-efficient and scalable protocol for arbitrary logical state preparation for the rotated surface code, and further experimentally implement it on the Zuchongzhi 2.1 superconducting quantum processor. An average of 0.8983±0.0002 logical fidelity at different logical states with distance three is achieved, taking into account both state preparation and measurement errors. In particular, the logical magic states |A^{π/4}⟩_{L}, |H⟩_{L}, and |T⟩_{L} are prepared nondestructively with logical fidelities of 0.8771±0.0009, 0.9090±0.0009, and 0.8890±0.0010, respectively, which are higher than the state distillation protocol threshold, 0.859 (for H-type magic state) and 0.827 (for T-type magic state). Our work provides a viable and efficient avenue for generating high-fidelity raw logical magic states, which is essential for realizing non-Clifford logical gates in the surface code.