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A CMOS Frequency Doubler from the Analog Cosine Mapping Function
Ist Teil von
Circuits, systems, and signal processing, 2019-04, Vol.38 (4), p.1506-1519
Ort / Verlag
New York: Springer US
Erscheinungsjahr
2019
Link zum Volltext
Quelle
Alma/SFX Local Collection
Beschreibungen/Notizen
This work presents the design of a new frequency doubler by a simple inductorless active network, without the exigency of additional quadrature signals. The frequency doubling function of the proposed circuit relies on the analog cosine mapping operation. The mapping circuit is possible in voltage mode as the circuit is based on two face-to-face CMOS inverters switched by the same differential input signal. The circuit is designed, with a simple set of functions, according to the nonlinear circuit’s nature. It was designed in a CMOS 0.18-
μ
m process with a doubling frequency up to
8
GHz
. The experimental results of the prototype on the mentioned frequency range show the frequency doubling operation with a phase noise figure of
-
130
dBc/Hz
@
10
KHz
offset from the carrier.