Sie befinden Sich nicht im Netzwerk der Universität Paderborn. Der Zugriff auf elektronische Ressourcen ist gegebenenfalls nur via VPN oder Shibboleth (DFN-AAI) möglich. mehr Informationen...
Ergebnis 13 von 436

Details

Autor(en) / Beteiligte
Titel
An Auto-Zero-Stabilized Voltage Buffer With a Quiet Chopping Scheme and Constant Sub-pA Input Current
Ist Teil von
  • IEEE journal of solid-state circuits, 2022-08, Vol.57 (8), p.2438-2448
Ort / Verlag
New York: IEEE
Erscheinungsjahr
2022
Link zum Volltext
Quelle
IEEE
Beschreibungen/Notizen
  • This article describes an auto-zero stabilized voltage buffer that achieves low offset and low noise with sub-pA input current. A high gain stabilization loop is used to periodically cancel the buffer's offset. The loop itself is periodically disconnected from the buffer and auto-zeroed, during which its bandwidth is reduced to reduce the associated noise folding. However, this also reduces its offset correction range, and so to avoid overloading, its initial offset is digitally trimmed. To break up the correlation between the residual low-frequency (LF) noise of the auto-zero and stabilization phases, the loop is periodically chopped, which significantly reduces the buffer's LF noise. Finally, the duty-cycle of the two phases is optimized to bring the buffer's LF noise density close to <inline-formula> <tex-math notation="LaTeX">\sqrt {2} </tex-math></inline-formula> times its white noise density (14 nV/<inline-formula> <tex-math notation="LaTeX">\sqrt {\text {Hz}} </tex-math></inline-formula>), which is the fundamental limit of an AZ amplifier. The buffer also achieves a constant and low input current (0.8 pA), as well as a state-of-the-art offset (0.4 <inline-formula> <tex-math notation="LaTeX">\mu \text{V} </tex-math></inline-formula>).
Sprache
Englisch
Identifikatoren
ISSN: 0018-9200
eISSN: 1558-173X
DOI: 10.1109/JSSC.2021.3127462
Titel-ID: cdi_ieee_primary_9626348

Weiterführende Literatur

Empfehlungen zum selben Thema automatisch vorgeschlagen von bX