Details

Autor(en) / Beteiligte

• Mortazavi, Yousof
• Wooyoung Jung
• Evans, Brian L.
• Hassibi, Arjang

Titel

A Mostly Digital PWM-Based \Delta\Sigma ADC With an Inherently Matched Multibit Quantizer/DAC

Ist Teil von

• IEEE transactions on circuits and systems. II, Express briefs, 2016-11, Vol.63 (11), p.1049-1053

Ort / Verlag

IEEE

Erscheinungsjahr

2016

Link zum Volltext

• Volltext

Quelle

IEEE Electronic Library (IEL)

Beschreibungen/Notizen

• A mostly digital pulsewidth-modulator-based delta-sigma (ΔΣ) analog-to-digital converter is proposed. This system takes advantage of the duration of pulses, rather than voltage or current, as the analog operand used in its closed-loop operation. Therefore, circuits that process the pulses are digital in nature and improve with scaling. Furthermore, the architecture allows inherently matched multibit quantizer/digital-to-analog converter (DAC) blocks by taking advantage of delay lines reusable in both quantization and DAC operation. A second novelty of this architecture is the modulator's adaptive excess delay, which synchronizes the asynchronous loop with an external reference clock. This mitigates the problems associated with nonuniform sampling. A first-order 3-b prototype of this architecture is presented. The core occupies an area of 0.0275 mm 2 in a 0.18-μm CMOS process, consumes 2.7 mW, and measures a 45.1-dB SNR over a 2-MHz bandwidth.