Details

Autor(en) / Beteiligte

• Liu, Jingcun
• Xiao, Ming
• Zhang, Ruizhe
• Pidaparthi, Subhash
• Cui, Hao
• Edwards, Andrew
• Craven, Michael
• Baubutr, Lek
• Drowley, Cliff
• Zhang, Yuhao

Titel

1.2-kV Vertical GaN Fin-JFETs: High-Temperature Characteristics and Avalanche Capability

Ist Teil von

• IEEE transactions on electron devices, 2021-04, Vol.68 (4), p.2025-2032

Ort / Verlag

New York: IEEE

Erscheinungsjahr

2021

Link zum Volltext

Quelle

IEEE Xplore

Beschreibungen/Notizen

• This work describes the high-temperature performance and avalanche capability of normally- off 1.2-K V-CLASS vertical gallium nitride (GaN) fin-channel junction field-effect transistors (Fin-JFETs). The GaN Fin-JFETs were fabricated by NexGen Power Systems, Inc. on 100-mm GaN-on-GaN wafers. The threshold voltage (<inline-formula> <tex-math notation="LaTeX">{V}_{\text {TH}} </tex-math></inline-formula>) is over 2 V with less than 0.15 V shift from 25 °C to 200 °C. The specific ON-resistance (<inline-formula> <tex-math notation="LaTeX">{R}_{ \mathrm{\scriptscriptstyle ON}} </tex-math></inline-formula>) increases from 0.82 at 25 °C to 1.8 <inline-formula> <tex-math notation="LaTeX">\text{m}\Omega \cdot </tex-math></inline-formula>cm 2 at 200 °C. The thermal stability of <inline-formula> <tex-math notation="LaTeX">{V}_{\text {TH}} </tex-math></inline-formula> and <inline-formula> <tex-math notation="LaTeX">{R}_{ \mathrm{\scriptscriptstyle ON}} </tex-math></inline-formula> are superior to the values reported in SiC MOSFETs and JFETs. At 200 °C, the gate leakage and drain leakage currents remain below <inline-formula> <tex-math notation="LaTeX">100~\mu \text{A} </tex-math></inline-formula> at −7-V gate bias and 1200-V drain bias, respectively. The gate leakage current mechanism is consistent with carrier hopping across the lateral p-n junction. The high-bias drain leakage current can be well described by the Poole-Frenkel (PF) emission model. An avalanche breakdown voltage (<inline-formula> <tex-math notation="LaTeX">BV_{\!\!\text {AVA}} </tex-math></inline-formula>) with positive temperature coefficient is shown in both the quasi-static <inline-formula> <tex-math notation="LaTeX">{I} </tex-math></inline-formula>-<inline-formula> <tex-math notation="LaTeX">{V} </tex-math></inline-formula> sweep and the unclamped inductive switching (UIS) tests. The UIS tests also reveal a <inline-formula> <tex-math notation="LaTeX">BV_{\!\!\text {AVA}} </tex-math></inline-formula> over 1700 V and a critical avalanche energy (<inline-formula> <tex-math notation="LaTeX">{E}_{\text {AVA}} </tex-math></inline-formula>) of 7.44 J/cm 2 , with the <inline-formula> <tex-math notation="LaTeX">{E}_{\text {AVA}} </tex-math></inline-formula> comparable to that of state-of-the-art SiC MOSFETs. These results show the great potentials of vertical GaN Fin-JFETs for medium-voltage power electronics applications.