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Details

Autor(en) / Beteiligte
Titel
A Unified Approach to Mapping and Routing on a Network-on-Chip for Both Best-Effort and Guaranteed Service Traffic
Ist Teil von
  • VLSI Design, 2007-01, Vol.2007, p.1-16
Ort / Verlag
Hindawi Limiteds
Erscheinungsjahr
2007
Link zum Volltext
Quelle
Free E-Journal (出版社公開部分のみ)
Beschreibungen/Notizen
  • One of the key steps in Network-on-Chip-based design is spatial mapping of cores and routing of the communication between those cores. Known solutions to the mapping and routing problems first map cores onto a topology and then route communication, using separate and possibly conflicting objective functions. In this paper, we present a unified single-objective algorithm, called Unified MApping, Routing, and Slot allocation (UMARS+). As the main contribution, we show how to couple path selection, mapping of cores, and channel time-slot allocation to minimize the network required to meet the constraints of the application. The time-complexity of UMARS+ is low and experimental results indicate a run-time only 20 % higher than that of path selection alone. We apply the algorithm to an MPEG decoder System-on-Chip, reducing area by 33 % , power dissipation by 35 % , and worst-case latency by a factor four over a traditional waterfall approach.
Sprache
Englisch
Identifikatoren
ISSN: 1065-514X
eISSN: 1563-5171
DOI: 10.1155/2007/68432
Titel-ID: cdi_crossref_primary_10_1155_2007_68432
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