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A normally- off SiC-JFET/GaN-HEMT cascode device is recently proposed, featuring a cascode configuration that incorporates a high-voltage (i.e., 1200 V) SiC junction field effect transistor (JFET) and a low-voltage GaN high electron mobility transistor (HEMT). This cascode device exhibits superior thermal stability and switching performance compared to the SiC MOSFETs, but also inevitably presents challenge in dv/dt -control as the input gate does not directly control the high-voltage JFET. Since dv/dt -control is of great importance to the management and suppression of electromagnetic interference in power electronics systems, methods of controlling the dv/dt rates of SiC/GaN cascode devices need to be developed. In this article, we conduct systematic investigation on different dv/dt control schemes with theoretical analysis and experimental evaluation. A dv/dt -control method based on diode-clamped external JFET gate resistor is proposed and evaluated by comparing it with other more conventional methods. The proposed dv/dt -control method is verified to provide a balanced dv/dt -control on the device turn- on and turn- off .