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Journal of the Institution of Engineers (India). Series B, Electrical Engineering, Electronics and telecommunication engineering, Computer engineering, 2015-09, Vol.96 (3), p.211-216
Analog and RF Performance Analysis of a Junctionless Electrically Induced Source/Drain Extension Cylindrical Surround Gate (JLEJ-CSG) MOSFET
Ist Teil von
Journal of the Institution of Engineers (India). Series B, Electrical Engineering, Electronics and telecommunication engineering, Computer engineering, 2015-09, Vol.96 (3), p.211-216
Ort / Verlag
New Delhi: Springer India
Erscheinungsjahr
2015
Link zum Volltext
Quelle
SpringerLink (Online service)
Beschreibungen/Notizen
Junctionless (JL) transistors have recently been reported as strong candidate for the future technology nodes because of ease of manufacturing and improved performance over conventional MOSFETs. In this paper, the analog and RF performances of a JL transistor have been evaluated with metal gate structure having higher work function in the middle with two side gates of lower work function (electrically induced source/drain junctions, EJ). This triple metal gate JLEJ cylindrical surrounding gate (CSG) MOSFET provides better response in terms of intrinsic gain, transconductance generation factor, early voltage, unity gain transition frequency, maximum frequency of oscillation, etc. over single metal junctionless cylindrical surrounding gate (JLSM) transistors. However, the analog and RF performance metrics have been observed to be degraded because of quantum mechanical effects. The I
ON
/I
OFF
ratio is improved by more than 10
5
times.