Details

Autor(en) / Beteiligte

• Bernstein, Joseph B.,

Titel

Reliability prediction from burn-in data fit to reliability models

Ort / Verlag

London, [England] : Elsevier,

Erscheinungsjahr

2014

Link zum Volltext

• Elsevier Books AutoHoldings

Beschreibungen/Notizen

• Description based upon print version of record.
• Includes bibliographical references and index.
• Front Cover; Reliability Prediction from Burn-In Data Fit to Reliability Models; Copyright Page; Contents; Introduction; 1 Shortcut to Accurate Reliability Prediction; 1.1 Background of FIT; 1.2 Multiple Failure Mechanism Model; 1.3 Acceleration Factor; 1.4 New Proportionality Method; 1.5 Chip Designer; 1.6 System Designer; 2 M-HTOL Principles; 2.1 Constant Rate Assumption; 2.2 Reliability Criteria; 2.3 The Failure Rate Curve for Electronic Systems; 2.4 Reliability Testing; 2.5 Accelerated Testing; 3 Failure Mechanisms; 3.1 Time-Dependent Dielectric Breakdown
• 3.1.1 Early Models for Dielectric Breakdown3.1.2 Acceleration Factors; 3.1.3 Models for Ultrathin Dielectric Breakdown; 3.1.4 Statistical Model; 3.2 Hot Carrier Injection; 3.2.1 Hot Carrier Effects; 3.2.2 Acceleration Factor; 3.2.3 Statistical Models for HCI Lifetime; 3.2.4 Lifetime Sensitivity; 3.3 Negative Bias Temperature Instability; 3.3.1 Degradation Models; 3.3.2 Lifetime Models; 3.4 Electromigration; 3.4.1 Lifetime Prediction; 3.4.2 Lifetime Distribution Model; 3.4.3 Lifetime Sensitivity; 3.5 Soft Errors Due to Memory Alpha Particles; 4 New M-HTOL Approach
• 4.1 Problematic Zero Failure Criteria4.2 Single Versus Multiple Competing Mechanisms; 4.3 AF Calculation; 4.3.1 TDDB, EM, and HCI Failure Rate Calculations under Single Failure Mechanism Assumption; 4.3.2 TDDB, EM, and HCI Failure Rate Calculations under Multiple Failure Mechanism Assumption; 4.4 Electronic System CFR Approximation/Justification; 4.4.1 Exponential Distribution; 4.4.2 The Reliability of Complex Systems; 4.4.3 Drenick's Theorem; 4.5 PoF-Based Circuits Reliability Prediction Methodology; 4.5.1 Methodology; 4.5.2 Assumptions; 4.5.3 Input Data; 4.5.4 Device Thermal Analysis
• 4.6 Cell Reliability Estimation4.6.1 ESF Evaluation; 4.6.2 Cell Reliability; 4.7 Chip Reliability Prediction; 4.7.1 Functional Block Reliability; 4.7.2 Power Network EM Estimation; 4.8 Matrix Method; Bibliography
• This work will educate chip and system designers on a method for accurately predicting circuit and system reliability in order to estimate failures that will occur in the field as a function of operating conditions at the chip level. This book will combine the knowledge taught in many reliability publications and illustrate how to use the knowledge presented by the semiconductor manufacturing companies in combination with the HTOL end-of-life testing that is currently performed by the chip suppliers as part of their standard qualification procedure and make accurate reliability predictions. Th
• English
• Description based on online resource; title from PDF title page (ebrary, viewed March 24, 2014).