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Post-Quantum Lattice-Based Cryptography Implementations: A Survey

ACM computing surveys, 2019-11, Vol.51 (6), p.1-41, Article 129

2019

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Instruction-Set Accelerated Implementation of CRYSTALS-Kyber

IEEE transactions on circuits and systems. I, Regular papers, 2021-11, Vol.68 (11), p.4648-4659

2021

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VPQC: A Domain-Specific Vector Processor for Post-Quantum Cryptography Based on RISC-V Architecture

IEEE transactions on circuits and systems. I, Regular papers, 2020-08, Vol.67 (8), p.2672-2684

2020

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Post-Quantum Cryptography on FPGA Based on Isogenies on Elliptic Curves

IEEE transactions on circuits and systems. I, Regular papers, 2017-01, Vol.64 (1), p.86-99

2017

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Fast Strategies for the Implementation of SIKE Round 3 on ARM Cortex-M4

IEEE transactions on circuits and systems. I, Regular papers, 2021-10, Vol.68 (10), p.4129-4141

2021

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The Impact of Quantum Computing on Present Cryptography

International journal of advanced computer science & applications, 2018, Vol.9 (3)

2018

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Compact Instruction Set Extensions for Kyber

IEEE transactions on computer-aided design of integrated circuits and systems, 2024-03, Vol.43 (3), p.1-1

2024

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Resilience Optimization of Post-Quantum Cryptography Key Encapsulation Algorithms

Sensors (Basel, Switzerland), 2023-06, Vol.23 (12), p.5379

2023

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Optimized Implementation of SIKE Round 2 on 64-bit ARM Cortex-A Processors

IEEE transactions on circuits and systems. I, Regular papers, 2020-08, Vol.67 (8), p.2659-2671

2020

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Efficient Hardware Arithmetic for Inverted Binary Ring-LWE Based Post-Quantum Cryptography

IEEE transactions on circuits and systems. I, Regular papers, 2022-08, Vol.69 (8), p.3297-3307

2022

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PipeNTT: A Pipelined Number Theoretic Transform Architecture

IEEE transactions on circuits and systems. II, Express briefs, 2022-10, Vol.69 (10), p.4068-4072

2022

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Toward Quantum Secured Distributed Energy Resources: Adoption of Post-Quantum Cryptography (PQC) and Quantum Key Distribution (QKD)

Energies (Basel), 2022-02, Vol.15 (3), p.714

2022

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A High-Performance Domain-Specific Processor With Matrix Extension of RISC-V for Module-LWE Applications

IEEE transactions on circuits and systems. I, Regular papers, 2022-07, Vol.69 (7), p.2871-2884

2022

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A Survey on Exotic Signatures for Post-quantum Blockchain: Challenges and Research Directions

ACM computing surveys, 2023-12, Vol.55 (12), p.1-32, Article 251

2023

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High Performance Modular Multiplication for SIDH

IEEE transactions on computer-aided design of integrated circuits and systems, 2020-10, Vol.39 (10), p.3118-3122

2020

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Highly-Efficient Hardware Architecture for CRYSTALS-Kyber With a Novel Conflict-Free Memory Access Pattern

IEEE transactions on circuits and systems. I, Regular papers, 2023-11, Vol.70 (11), p.1-11

2023

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New Design of Blockwise Interleaved Ideal Low-Rank Parity-Check Codes for Fast Post-Quantum Cryptography

IEEE communications letters, 2023-05, Vol.27 (5), p.1-1

2023

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A Faster Software Implementation of the Supersingular Isogeny Diffie-Hellman Key Exchange Protocol

IEEE transactions on computers, 2018-11, Vol.67 (11), p.1622-1636

2018

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High Throughput Acceleration of Scabbard Key Exchange and Key Encapsulation Mechanism Using Tensor Core on GPU for IoT Applications

IEEE internet of things journal, 2023-11, Vol.10 (22), p.1-1

2023

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Secure IoT in the Era of Quantum Computers-Where Are the Bottlenecks?

Sensors (Basel, Switzerland), 2022-03, Vol.22 (7), p.2484

2022

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Post-Quantum Era Privacy Protection for Intelligent Infrastructures

IEEE access, 2021-01, Vol.9, p.36038-36077

2021

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Survey of Promising Technologies for Quantum Drones and Networks

IEEE access, 2021, Vol.9, p.125868-125911

2021

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RePQC: A 3.4-uJ/Op 48-kOPS Post-Quantum Crypto-Processor for Multiple-Mathematical Problems

IEEE journal of solid-state circuits, 2023-01, Vol.58 (1), p.1-17

2023

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Design of an Efficient NTT/INTT Architecture with Low-Complex Memory Mapping Scheme

IEEE transactions on circuits and systems. II, Express briefs, 2024-01, Vol.71 (1), p.1-1

2024

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High-Throughput Polynomial Multiplier for Accelerating Saber on FPGA

IEEE transactions on circuits and systems. II, Express briefs, 2023-09, Vol.70 (9), p.1-1

2023

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Post-Quantum Lattice-Based Cryptography Implementations: A Survey

Instruction-Set Accelerated Implementation of CRYSTALS-Kyber

VPQC: A Domain-Specific Vector Processor for Post-Quantum Cryptography Based on RISC-V Architecture

Post-Quantum Cryptography on FPGA Based on Isogenies on Elliptic Curves

Fast Strategies for the Implementation of SIKE Round 3 on ARM Cortex-M4

The Impact of Quantum Computing on Present Cryptography

Compact Instruction Set Extensions for Kyber

Resilience Optimization of Post-Quantum Cryptography Key Encapsulation Algorithms

Optimized Implementation of SIKE Round 2 on 64-bit ARM Cortex-A Processors

Efficient Hardware Arithmetic for Inverted Binary Ring-LWE Based Post-Quantum Cryptography

PipeNTT: A Pipelined Number Theoretic Transform Architecture

Toward Quantum Secured Distributed Energy Resources: Adoption of Post-Quantum Cryptography (PQC) and Quantum Key Distribution (QKD)

A High-Performance Domain-Specific Processor With Matrix Extension of RISC-V for Module-LWE Applications

A Survey on Exotic Signatures for Post-quantum Blockchain: Challenges and Research Directions

High Performance Modular Multiplication for SIDH

Highly-Efficient Hardware Architecture for CRYSTALS-Kyber With a Novel Conflict-Free Memory Access Pattern

New Design of Blockwise Interleaved Ideal Low-Rank Parity-Check Codes for Fast Post-Quantum Cryptography

A Faster Software Implementation of the Supersingular Isogeny Diffie-Hellman Key Exchange Protocol

High Throughput Acceleration of Scabbard Key Exchange and Key Encapsulation Mechanism Using Tensor Core on GPU for IoT Applications

Secure IoT in the Era of Quantum Computers-Where Are the Bottlenecks?

Post-Quantum Era Privacy Protection for Intelligent Infrastructures

Survey of Promising Technologies for Quantum Drones and Networks

RePQC: A 3.4-uJ/Op 48-kOPS Post-Quantum Crypto-Processor for Multiple-Mathematical Problems

Design of an Efficient NTT/INTT Architecture with Low-Complex Memory Mapping Scheme

High-Throughput Polynomial Multiplier for Accelerating Saber on FPGA

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