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Design of Low-Power High-Speed Truncation-Error-Tolerant Adder and Its Application in Digital Signal Processing

IEEE transactions on very large scale integration (VLSI) systems, 2010-08, Vol.18 (8), p.1225-1229

2010

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FPGA-Based Accelerators of Deep Learning Networks for Learning and Classification: A Review

IEEE access, 2019, Vol.7, p.7823-7859

2019

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Survey of Turbo, LDPC, and Polar Decoder ASIC Implementations

IEEE Communications surveys and tutorials, 2019-01, Vol.21 (3), p.2309-2333

2019

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Co-Optimization of Circuits, Layout and Lithography for Predictive Technology Scaling Beyond Gratings

IEEE transactions on computer-aided design of integrated circuits and systems, 2010-04, Vol.29 (4), p.509-527

2010

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Scaling Energy Per Operation via an Asynchronous Pipeline

IEEE transactions on very large scale integration (VLSI) systems, 2013-01, Vol.21 (1), p.147-151

2013

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Volltext

LCHR-TSV: Novel Low Cost and Highly Repairable Honeycomb-Based TSV Redundancy Architecture for Clustered Faults

IEEE transactions on computer-aided design of integrated circuits and systems, 2020-10, Vol.39 (10), p.2938-2951

2020

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Synthesis and optimization of reversible circuits-a survey

ACM computing surveys, 2013-02, Vol.45 (2), p.1-34

2013

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A multiparameter moment-matching model-reduction approach for generating geometrically parameterized interconnect performance models

IEEE transactions on computer-aided design of integrated circuits and systems, 2004-05, Vol.23 (5), p.678-693

2004

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Dynamic energy-accuracy trade-off using stochastic computing in deep neural networks

2016 53nd ACM/EDAC/IEEE Design Automation Conference (DAC), 2016, p.1-6

2016

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Outstanding Research Problems in NoC Design: System, Microarchitecture, and Circuit Perspectives

IEEE transactions on computer-aided design of integrated circuits and systems, 2009-01, Vol.28 (1), p.3-21

2009

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Functional Analysis Attacks on Logic Locking

IEEE transactions on information forensics and security, 2020, Vol.15, p.2514-2527

2020

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Volltext

Characterization of a Novel Nine-Transistor SRAM Cell

IEEE transactions on very large scale integration (VLSI) systems, 2008-04, Vol.16 (4), p.488-492

2008

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Volltext

Benchmarking of Beyond-CMOS Exploratory Devices for Logic Integrated Circuits

IEEE journal on exploratory solid-state computational devices and circuits, 2015-12, Vol.1, p.3-11

2015

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Silicon Demonstration of Hardware Trojan Design and Detection in Wireless Cryptographic ICs

IEEE transactions on very large scale integration (VLSI) systems, 2017-04, Vol.25 (4), p.1506-1519

2017

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Volltext

Recent thermal management techniques for microprocessors

ACM computing surveys, 2012-06, Vol.44 (3), p.1-42

2012

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Utility-Based Cache Partitioning: A Low-Overhead, High-Performance, Runtime Mechanism to Partition Shared Caches

2006 39th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO'06), 2006, p.423-432

2006

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Design of Ternary Logic Combinational Circuits Based on Quantum Dot Gate FETs

IEEE transactions on very large scale integration (VLSI) systems, 2013-05, Vol.21 (5), p.793-806

2013

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Volltext

Ten years of hardware Trojans: a survey from the attacker's perspective

IET computers & digital techniques, 2020-11, Vol.14 (6), p.231-246

2020

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Stochastic circuits for real-time image-processing applications

2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC), 2013, p.1-6

2013

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Volltext

Reducing DRAM latency via charge-level-aware look-ahead partial restoration

2018 51st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO), 2018, p.298-311

2018

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Provably Secure Camouflaging Strategy for IC Protection

IEEE transactions on computer-aided design of integrated circuits and systems, 2019-08, Vol.38 (8), p.1399-1412

2019

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Volltext

Architecture of Ring-Based Redundant TSV for Clustered Faults

IEEE transactions on very large scale integration (VLSI) systems, 2016-12, Vol.24 (12), p.3437-3449

2016

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Hardware Optimized and Error Reduced Approximate Adder

Electronics (Basel), , Vol.8 (11), p.1212

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Design of Highly Linear Broadband Continuous Mode GaN MMIC Power Amplifiers for 5G

IEEE access, 2019, Vol.7, p.57138-57150

2019

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Simulation and Experimental Demonstration of the Importance of IR-Drops During Laser Fault Injection

IEEE transactions on computer-aided design of integrated circuits and systems, 2020-06, Vol.39 (6), p.1231-1244

2020

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Design of Low-Power High-Speed Truncation-Error-Tolerant Adder and Its Application in Digital Signal Processing

FPGA-Based Accelerators of Deep Learning Networks for Learning and Classification: A Review

Survey of Turbo, LDPC, and Polar Decoder ASIC Implementations

Co-Optimization of Circuits, Layout and Lithography for Predictive Technology Scaling Beyond Gratings

Scaling Energy Per Operation via an Asynchronous Pipeline

LCHR-TSV: Novel Low Cost and Highly Repairable Honeycomb-Based TSV Redundancy Architecture for Clustered Faults

Synthesis and optimization of reversible circuits-a survey

A multiparameter moment-matching model-reduction approach for generating geometrically parameterized interconnect performance models

Dynamic energy-accuracy trade-off using stochastic computing in deep neural networks

Outstanding Research Problems in NoC Design: System, Microarchitecture, and Circuit Perspectives

Functional Analysis Attacks on Logic Locking

Characterization of a Novel Nine-Transistor SRAM Cell

Benchmarking of Beyond-CMOS Exploratory Devices for Logic Integrated Circuits

Silicon Demonstration of Hardware Trojan Design and Detection in Wireless Cryptographic ICs

Recent thermal management techniques for microprocessors

Utility-Based Cache Partitioning: A Low-Overhead, High-Performance, Runtime Mechanism to Partition Shared Caches

Design of Ternary Logic Combinational Circuits Based on Quantum Dot Gate FETs

Ten years of hardware Trojans: a survey from the attacker's perspective

Stochastic circuits for real-time image-processing applications

Reducing DRAM latency via charge-level-aware look-ahead partial restoration

Provably Secure Camouflaging Strategy for IC Protection

Architecture of Ring-Based Redundant TSV for Clustered Faults

Hardware Optimized and Error Reduced Approximate Adder

Design of Highly Linear Broadband Continuous Mode GaN MMIC Power Amplifiers for 5G

Simulation and Experimental Demonstration of the Importance of IR-Drops During Laser Fault Injection

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