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International Symposium on Computer Architecture: Proceedings of the 31st annual international symposium on Computer architecture : Munchen, Germany; 19-23 June 2004, 2004, p.64-75

2004

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Prototype IC with WDDL and Differential Routing – DPA Resistance Assessment

Cryptographic Hardware and Embedded Systems – CHES 2005, 2005, p.354-365

2005

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Managing Wire Delay in Large Chip-Multiprocessor Caches

37th International Symposium on Microarchitecture (MICRO-37'04), 2004, p.319-330

2004

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Pinpointing the Side-Channel Leakage of Masked AES Hardware Implementations

Cryptographic Hardware and Embedded Systems - CHES 2006, 2006, p.76-90

2006

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Templates vs. Stochastic Methods: A Performance Analysis for Side Channel Cryptanalysis

Implementing Cryptographic Pairings on Smartcards

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Security evaluation of DPA countermeasures using dual-rail pre-charge logic style

A Very Compact S-Box for AES

Cache-Collision Timing Attacks Against AES

Strong Authentication for RFID Systems Using the AES Algorithm

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Prototype IC with WDDL and Differential Routing – DPA Resistance Assessment

Managing Wire Delay in Large Chip-Multiprocessor Caches

Pinpointing the Side-Channel Leakage of Masked AES Hardware Implementations

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