UB Paderborn / Katalog / Suche / in CDI

A 0.1-W CMOS class-E power amplifier for Bluetooth applications

TENCON 2003. Conference on Convergent Technologies for Asia-Pacific Region, 2003, Vol.4, p.1348-1351 Vol.4

2003

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A 0.18μm CMOS 300MHz Current-Mode LF Seventh-order Linear Phase Filter for Hard Disk Read Channels

2007 IEEE International Symposium on Circuits and Systems (ISCAS), 2007, p.3307-3310

2007

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A 0.18μM CMOS 900 MHz receiver front-end using RF Q-enhanced filters

2004

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A 0.18-μm CMOS Squarer Circuit for a Non-Coherent UWB Receiver

2007 IEEE International Symposium on Circuits and Systems (ISCAS), 2007, p.421-424

2007

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A 0.18μm CMOS 2.1GHz Sub-sampling Receiver Front End with Fully Integrated Second- and Fourth-Order Q-Enhanced Filters

2007 IEEE International Symposium on Circuits and Systems (ISCAS), 2007, p.3103-3106

2007

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A 0.25-um BiCMOS Feed Foward Equalizer Using Active Delay Line for Backplane Communication

2007 IEEE International Symposium on Circuits and Systems (ISCAS), 2007, p.193-196

2007

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THE 0.4 ARC-SEC TANDEM-X INTERMEDIATE DEM WITH RESPECT TO THE SRTM AND ASTER GLOBAL DEMS

International archives of the photogrammetry, remote sensing and spatial information sciences., 2015, Vol.XL-3/W2 (3), p.253-259

2015

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0.5-V fully differential allpass section

2016 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS), 2016, p.1-4

2016

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0.5 V Two-Stage Subthreshold Fully Differential Miller Compensated OTA Using Voltage Combiners

Advances in VLSI, Communication, and Signal Processing, p.463-479

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A 0.5V Bulk-Input Operational Transconductance Amplifier with Improved Common-Mode Feedback

2007 IEEE International Symposium on Circuits and Systems (ISCAS), 2007, p.2224-2227

2007

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A 0.8 μm CMOS digital signal processor for a video camera

IEEE 1993 International Conference on Consumer Electronics Digest of Technical Papers, 1993, p.166-167

1993

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L 0 -norm constraint normalized logarithmic subband adaptive filter algorithm

Signal, image and video processing, 2018-07, Vol.12 (5), p.861-868

2018

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1/2 Order Fractional Differential Tree Type Circuit of Digital Image

2008 Congress on Image and Signal Processing, 2008, Vol.3, p.331-334

2008

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L 1 / 2 -Regularized Deconvolution Network for the Representation and Restoration of Optical Remote Sensing Images

IEEE transactions on geoscience and remote sensing, 2014-05, Vol.52 (5), p.2617-2627

2014

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The 1:3 phased demultiplexer circuit

International Conference on Electrical, Electronic and Computer Engineering, 2004. ICEEC '04, 2004, p.495-498

Poriazis, S.

2004

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A 1/4-inch 250k Pixel IT-CCD Image Sensor

IEEE 1993 International Conference on Consumer Electronics Digest of Technical Papers, 1993, p.160-161

1993

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A 1.5 GFLOPS Reciprocal Unit for Computer Graphics

2006 Fortieth Asilomar Conference on Signals, Systems and Computers, 2006, p.1682-1686

2006

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A 1.5-V Low-Power Common-Gate Low Noise Amplifier for Ultrawideband Receivers

2007 IEEE International Symposium on Circuits and Systems (ISCAS), 2007, p.2618-2621

2007

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A 1.5V 10-b 30-MS/s CMOS Pipelined Analog-to-Digital Converter

2007 IEEE International Symposium on Circuits and Systems (ISCAS), 2007, p.1955-1958

2007

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A 1,632 Gate-Count Zero-Overhead Dynamic Optically Reconfigurable Gate Array VLSI

Lecture notes in computer science, 2006, p.268-273

2006

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1.7-Micron Optical Coherence Tomography Angiography for Characterization of Skin Lesions-A Feasibility Study

IEEE transactions on medical imaging, 2021-09, Vol.40 (9), p.2507-2512

2021

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A 1/8-rate clock and data recovery architecture for high-speed communication systems

2004

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A 1.9mW Portable ADPLL-based Frequency Synthesizer for High Speed Clock Generation

2007 IEEE International Symposium on Circuits and Systems (ISCAS), 2007, p.1137-1140

2007

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O(1) bilateral filtering with low memory usage

2010 IEEE International Conference on Image Processing, 2010, p.3301-3304

2010

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1-Bit Radar Imaging Based on Adversarial Samples

IEEE transactions on geoscience and remote sensing, 2022, Vol.60, p.1-13

2022

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A 0.1-W CMOS class-E power amplifier for Bluetooth applications

A 0.18μm CMOS 300MHz Current-Mode LF Seventh-order Linear Phase Filter for Hard Disk Read Channels

A 0.18μM CMOS 900 MHz receiver front-end using RF Q-enhanced filters

A 0.18-μm CMOS Squarer Circuit for a Non-Coherent UWB Receiver

A 0.18μm CMOS 2.1GHz Sub-sampling Receiver Front End with Fully Integrated Second- and Fourth-Order Q-Enhanced Filters

A 0.25-um BiCMOS Feed Foward Equalizer Using Active Delay Line for Backplane Communication

THE 0.4 ARC-SEC TANDEM-X INTERMEDIATE DEM WITH RESPECT TO THE SRTM AND ASTER GLOBAL DEMS

0.5-V fully differential allpass section

0.5 V Two-Stage Subthreshold Fully Differential Miller Compensated OTA Using Voltage Combiners

A 0.5V Bulk-Input Operational Transconductance Amplifier with Improved Common-Mode Feedback

A 0.8 μm CMOS digital signal processor for a video camera

L 0 -norm constraint normalized logarithmic subband adaptive filter algorithm

1/2 Order Fractional Differential Tree Type Circuit of Digital Image

L 1 / 2 -Regularized Deconvolution Network for the Representation and Restoration of Optical Remote Sensing Images

The 1:3 phased demultiplexer circuit

A 1/4-inch 250k Pixel IT-CCD Image Sensor

A 1.5 GFLOPS Reciprocal Unit for Computer Graphics

A 1.5-V Low-Power Common-Gate Low Noise Amplifier for Ultrawideband Receivers

A 1.5V 10-b 30-MS/s CMOS Pipelined Analog-to-Digital Converter

A 1,632 Gate-Count Zero-Overhead Dynamic Optically Reconfigurable Gate Array VLSI

1.7-Micron Optical Coherence Tomography Angiography for Characterization of Skin Lesions-A Feasibility Study

A 1/8-rate clock and data recovery architecture for high-speed communication systems

A 1.9mW Portable ADPLL-based Frequency Synthesizer for High Speed Clock Generation

O(1) bilateral filtering with low memory usage

1-Bit Radar Imaging Based on Adversarial Samples

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