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A 0.002-mm ^ 6.4-mW 10-Gb/s Full-Rate Direct DFE Receiver With 59.6% Horizontal Eye Opening Under 23.3-dB Channel Loss at Nyquist Frequency

IEEE transactions on microwave theory and techniques, 2014-12, Vol.62 (12), p.3107-3117

2014

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A 0.004% resolution & SAT<1.8 μson-chip adaptive anti-aging system using cuckoo intelligence-based algorithm in 65 nm CMOS

Integration (Amsterdam), 2021-05, Vol.78, p.135-143

2021

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0-1 Combinatorial Optimization Problems with Qualitative and Uncertain Profits

Integrated Uncertainty in Knowledge Modelling and Decision Making, 2023, Vol.14375, p.139-151

2023

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A 0-1 control mechanism with partial information for periodic tumour motion classification

2010 IEEE International Symposium on Intelligent Control, 2010, p.1281-1286

Lin, C J

2010

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A 0–1 integer linear programming approach to schedule outages of nuclear power plants

Journal of scheduling, 2013-12, Vol.16 (6), p.551-566

2013

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The 0-1 knapsack problem with fuzzy data

Fuzzy optimization and decision making, 2007-06, Vol.6 (2), p.163-172

2007

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A 0-1 Law in Mathematical Fuzzy Logic

IEEE transactions on fuzzy systems, 2022-09, Vol.30 (9), p.3833-3840

2022

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0–1 linear integer programming method for granule knowledge reduction and attribute reduction in concept lattices

Soft computing (Berlin, Germany), 2019-01, Vol.23 (2), p.383-391

2019

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0–1 Linear programming methods for optimal normal and pseudo parameter reductions of soft sets

Applied soft computing, 2017-05, Vol.54, p.467-484

2017

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A 0–1 quadratic knapsack problem for modelizing and solving the constraint satisfaction problems

Lecture notes in computer science, 2005, p.61-72

Ettaouil, Mohamed

2005

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A 0.1-W CMOS class-E power amplifier for Bluetooth applications

TENCON 2003. Conference on Convergent Technologies for Asia-Pacific Region, 2003, Vol.4, p.1348-1351 Vol.4

2003

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A 0.135 /spl mu/m/sup 2/ 6F/sup 2/ trench-sidewall vertical device cell for 4 Gb/16 Gb DRAM

2000 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.00CH37104), 2000, p.80-81

2000

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A 0.13mJ/Prediction CIFAR-100 Raster-Scan- Based Wired-Logic Processor Using Non-Linear Neural Network

2023 IEEE International Symposium on Circuits and Systems (ISCAS), 2023, p.1-5

2023

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A 0.18μm CMOS 300MHz Current-Mode LF Seventh-order Linear Phase Filter for Hard Disk Read Channels

2007 IEEE International Symposium on Circuits and Systems (ISCAS), 2007, p.3307-3310

2007

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A 0.18μm CMOS implementation of an area efficient precise exception handling unit for processing-in-memory systems

2004

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A 0.18-μm CMOS Squarer Circuit for a Non-Coherent UWB Receiver

2007 IEEE International Symposium on Circuits and Systems (ISCAS), 2007, p.421-424

2007

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A 0.18-$\mu $m current-mode asynchronous sigma-delta modulator design

Elektrik : Turkish journal of electrical engineering & computer sciences, 2016, Vol.24, p.4569-4581

2016

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A 0.18μm CMOS 2.1GHz Sub-sampling Receiver Front End with Fully Integrated Second- and Fourth-Order Q-Enhanced Filters

2007 IEEE International Symposium on Circuits and Systems (ISCAS), 2007, p.3103-3106

2007

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0.2 Micron length T-shaped gate fabrication using angle evaporation

IEEE electron device letters, 1983-04, Vol.4 (4), p.122-124

1983

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0.2- mu m gate AlGaAs/GaAs HIGFET (heterostructure insulated gate FET) with a

IEEE transactions on electron devices, 1991-12, Vol.38 (12), p.2704

1991

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A 0.25-um BiCMOS Feed Foward Equalizer Using Active Delay Line for Backplane Communication

2007 IEEE International Symposium on Circuits and Systems (ISCAS), 2007, p.193-196

2007

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0.2μm Gate AlGaAs/GaAs HIGFETt (Heterostructure Insulated gate FET) with a (111) face of n+-GaAs selectively grown by MOCVD

[1991] 49th Annual Device Research Conference Digest, 1991, p.IIIB_6-0_45

1991

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A 0.3-V Energy-Efficient Low-Noise CMOS OTA for Portable Bioelectric Signal Acquisition Systems

2022 20th IEEE Interregional NEWCAS Conference (NEWCAS), 2022, p.213-217

2022

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A 0.33 mW Bulk Injection Downconverter RFIC for WSN Applications

Proceedings of the 2nd International Conference on Intelligent Technologies and Engineering Systems (ICITES2013), p.75-80

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0.35 /spl mu/m, 43 /spl mu//spl Omega/cm/sup 2/, 6 m/spl Omega/ power MOSFET to power future microprocessor

11th International Symposium on Power Semiconductor Devices and ICs. ISPSD'99 Proceedings (Cat. No.99CH36312), 1999, p.77-80

1999

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A 0.002-mm ^ 6.4-mW 10-Gb/s Full-Rate Direct DFE Receiver With 59.6% Horizontal Eye Opening Under 23.3-dB Channel Loss at Nyquist Frequency

A 0.004% resolution & SAT<1.8 μson-chip adaptive anti-aging system using cuckoo intelligence-based algorithm in 65 nm CMOS

0-1 Combinatorial Optimization Problems with Qualitative and Uncertain Profits

A 0-1 control mechanism with partial information for periodic tumour motion classification

A 0–1 integer linear programming approach to schedule outages of nuclear power plants

The 0-1 knapsack problem with fuzzy data

A 0-1 Law in Mathematical Fuzzy Logic

0–1 linear integer programming method for granule knowledge reduction and attribute reduction in concept lattices

0–1 Linear programming methods for optimal normal and pseudo parameter reductions of soft sets

A 0–1 quadratic knapsack problem for modelizing and solving the constraint satisfaction problems

A 0.1-W CMOS class-E power amplifier for Bluetooth applications

A 0.135 /spl mu/m/sup 2/ 6F/sup 2/ trench-sidewall vertical device cell for 4 Gb/16 Gb DRAM

A 0.13mJ/Prediction CIFAR-100 Raster-Scan- Based Wired-Logic Processor Using Non-Linear Neural Network

A 0.18μm CMOS 300MHz Current-Mode LF Seventh-order Linear Phase Filter for Hard Disk Read Channels

A 0.18μm CMOS implementation of an area efficient precise exception handling unit for processing-in-memory systems

A 0.18-μm CMOS Squarer Circuit for a Non-Coherent UWB Receiver

A 0.18-$\mu $m current-mode asynchronous sigma-delta modulator design

A 0.18μm CMOS 2.1GHz Sub-sampling Receiver Front End with Fully Integrated Second- and Fourth-Order Q-Enhanced Filters

0.2 Micron length T-shaped gate fabrication using angle evaporation

0.2- mu m gate AlGaAs/GaAs HIGFET (heterostructure insulated gate FET) with a

A 0.25-um BiCMOS Feed Foward Equalizer Using Active Delay Line for Backplane Communication

0.2μm Gate AlGaAs/GaAs HIGFETt (Heterostructure Insulated gate FET) with a (111) face of n+-GaAs selectively grown by MOCVD

A 0.3-V Energy-Efficient Low-Noise CMOS OTA for Portable Bioelectric Signal Acquisition Systems

A 0.33 mW Bulk Injection Downconverter RFIC for WSN Applications

0.35 /spl mu/m, 43 /spl mu//spl Omega/cm/sup 2/, 6 m/spl Omega/ power MOSFET to power future microprocessor

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