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Benchmarking of Beyond-CMOS Exploratory Devices for Logic Integrated Circuits

IEEE journal on exploratory solid-state computational devices and circuits, 2015-12, Vol.1, p.3-11

2015

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IEEE Journal on Exploratory Solid-State Computational Devices and Circuits-Volume 5, No. 2

IEEE journal on exploratory solid-state computational devices and circuits, 2019-12, Vol.5 (2), p.ii-iii

Young, Ian A.

2019

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IEEE Journal on Exploratory Solid-State Computational Devices and Circuits-Second Issue

IEEE journal on exploratory solid-state computational devices and circuits, 2016-12, Vol.2, p.ii-ii

Young, Ian

2016

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IEEE Journal on Exploratory Solid-State Computational Devices and Circuits-Volume 4, No. 2

IEEE journal on exploratory solid-state computational devices and circuits, 2018-12, Vol.4 (2), p.ii-iii

Young, Ian A.

2018

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Benchmarking Delay and Energy of Neural Inference Circuits

IEEE journal on exploratory solid-state computational devices and circuits, 2019-12, Vol.5 (2), p.75-84

2019

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Coupled-Oscillator Associative Memory Array Operation for Pattern Recognition

IEEE journal on exploratory solid-state computational devices and circuits, 2015-12, Vol.1, p.85-93

2015

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IEEE Journal on Exploratory Solid-State Computational Devices and Circuits Launches

IEEE journal on exploratory solid-state computational devices and circuits, 2015-12, Vol.1, p.1-1

Young, Ian

2015

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IEEE Journal on Exploratory Solid-State Computational Devices and Circuits-Vol. 4, No. 1

IEEE journal on exploratory solid-state computational devices and circuits, 2018-06, Vol.4 (1), p.ii-iii

Young, Ian A.

2018

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Differential Electrically Insulated Magnetoelectric Spin-Orbit Logic Circuits

IEEE journal on exploratory solid-state computational devices and circuits, 2021-06, Vol.7 (1), p.18-25

2021

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Physics-Based Models for Magneto-Electric Spin-Orbit Logic Circuits

IEEE journal on exploratory solid-state computational devices and circuits, 2022-06, Vol.8 (1), p.10-18

2022

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IEEE Journal on Exploratory Solid-State Computational Devices and Circuits-Third Issue

IEEE journal on exploratory solid-state computational devices and circuits, 2017-12, Vol.3, p.iii-iv

Young, Ian A.

2017

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Energy Efficient Logic and Memory Design With Beyond-CMOS Magnetoelectric Spin–Orbit (MESO) Technology Toward Ultralow Supply Voltage

IEEE journal on exploratory solid-state computational devices and circuits, 2023-12, Vol.9 (2), p.124-133

2023

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A Thermodynamic Perspective of Negative-Capacitance Field-Effect Transistors

IEEE journal on exploratory solid-state computational devices and circuits, 2017-12, Vol.3, p.56-64

2017

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Synchronous Circuit Design With Beyond-CMOS Magnetoelectric Spin-Orbit Devices Toward 100-mV Logic

IEEE journal on exploratory solid-state computational devices and circuits, 2019-06, Vol.5 (1), p.1-9

2019

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Inversion Charge Boost and Transient Steep-Slope Induced by Free-Charge-Polarization Mismatch in a Ferroelectric-Metal-Oxide-Semiconductor Capacitor

IEEE journal on exploratory solid-state computational devices and circuits, 2018-12, Vol.4 (2), p.44-49

2018

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Error-Resilient Spintronics via the Shannon- Inspired Model of Computation

IEEE journal on exploratory solid-state computational devices and circuits, 2019-06, Vol.5 (1), p.10-18

2019

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Boosted Spin Channel Networks for Energy-Efficient Inference

IEEE journal on exploratory solid-state computational devices and circuits, 2019-06, Vol.5 (1), p.34-42

2019

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Corrections to "Synchronous Circuit Design With Beyond-CMOS Magnetoelectric Spin-Orbit Devices Toward 100-mV Logic" [Jun 19 1-9]

IEEE journal on exploratory solid-state computational devices and circuits, 2019-12, Vol.5 (2), p.74-74

2019

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Energy Efficient Logic and Memory Design with Beyond-CMOS Magneto-Electric Spin-Orbit (MESO) Technology toward Ultra Low Supply Voltage

IEEE journal on exploratory solid-state computational devices and circuits, 2023-10, p.1-1

2023

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Improving Energy Efficiency of Low-Voltage Logic by Technology-Driven Design

IEEE journal on exploratory solid-state computational devices and circuits, 2018-06, Vol.4 (1), p.10-18

2018

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Nonboolean Pattern Recognition Using Chains of Coupled CMOS Oscillators as Discriminant Circuits

IEEE journal on exploratory solid-state computational devices and circuits, 2017-12, Vol.3, p.1-9

2017

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Electrical-Spin Transduction for CMOS-Spintronic Interface and Long-Range Interconnects

IEEE journal on exploratory solid-state computational devices and circuits, 2017-12, Vol.3, p.47-55

2017

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Clocked Domain Wall Logic Using Magnetoelectric Effects

IEEE journal on exploratory solid-state computational devices and circuits, 2016-12, Vol.2, p.1-9

2016

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Interconnects for All-Spin Logic Using Automotion of Domain Walls

IEEE journal on exploratory solid-state computational devices and circuits, 2015-12, Vol.1, p.49-57

2015

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Benchmarking of Beyond-CMOS Exploratory Devices for Logic Integrated Circuits

IEEE Journal on Exploratory Solid-State Computational Devices and Circuits-Volume 5, No. 2

IEEE Journal on Exploratory Solid-State Computational Devices and Circuits-Second Issue

IEEE Journal on Exploratory Solid-State Computational Devices and Circuits-Volume 4, No. 2

Benchmarking Delay and Energy of Neural Inference Circuits

Coupled-Oscillator Associative Memory Array Operation for Pattern Recognition

IEEE Journal on Exploratory Solid-State Computational Devices and Circuits Launches

IEEE Journal on Exploratory Solid-State Computational Devices and Circuits-Vol. 4, No. 1

Differential Electrically Insulated Magnetoelectric Spin-Orbit Logic Circuits

Physics-Based Models for Magneto-Electric Spin-Orbit Logic Circuits

IEEE Journal on Exploratory Solid-State Computational Devices and Circuits-Third Issue

Energy Efficient Logic and Memory Design With Beyond-CMOS Magnetoelectric Spin–Orbit (MESO) Technology Toward Ultralow Supply Voltage

A Thermodynamic Perspective of Negative-Capacitance Field-Effect Transistors

Synchronous Circuit Design With Beyond-CMOS Magnetoelectric Spin-Orbit Devices Toward 100-mV Logic

Inversion Charge Boost and Transient Steep-Slope Induced by Free-Charge-Polarization Mismatch in a Ferroelectric-Metal-Oxide-Semiconductor Capacitor

Error-Resilient Spintronics via the Shannon- Inspired Model of Computation

Boosted Spin Channel Networks for Energy-Efficient Inference

Corrections to "Synchronous Circuit Design With Beyond-CMOS Magnetoelectric Spin-Orbit Devices Toward 100-mV Logic" [Jun 19 1-9]

Energy Efficient Logic and Memory Design with Beyond-CMOS Magneto-Electric Spin-Orbit (MESO) Technology toward Ultra Low Supply Voltage

Improving Energy Efficiency of Low-Voltage Logic by Technology-Driven Design

Nonboolean Pattern Recognition Using Chains of Coupled CMOS Oscillators as Discriminant Circuits

Electrical-Spin Transduction for CMOS-Spintronic Interface and Long-Range Interconnects

Clocked Domain Wall Logic Using Magnetoelectric Effects

Interconnects for All-Spin Logic Using Automotion of Domain Walls

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