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A 128 x 128 Single-Photon Image Sensor With Column-Level 10-Bit Time-to-Digital Converter Array

IEEE journal of solid-state circuits, 2008, Vol.43 (12), p.2977-2989

2008

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A 12-Bit, 10-MHz Bandwidth, Continuous-Time ΣΔ ADC With a 5-Bit, 950-MS/s VCO-Based Quantizer

IEEE journal of solid-state circuits, 2008, Vol.43 (4), p.805-814

2008

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A Low-Noise Wide-BW 3.6-GHz Digital ΔΣ Fractional-N Frequency Synthesizer With a Noise-Shaping Time-to-Digital Converter and Quantization Noise Cancellation

IEEE journal of solid-state circuits, 2008, Vol.43 (12), p.2776-2786

2008

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A 2.1 M Pixels, 120 Frame/s CMOS Image Sensor With Column-Parallel ΔΣ ADC Architecture

IEEE journal of solid-state circuits, 2011, Vol.46 (1), p.236-247

2011

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A 12-Bit Vernier Ring Time-to-Digital Converter in 0.13 μm CMOS Technology

IEEE journal of solid-state circuits, 2010, Vol.45 (4), p.830-842

2010

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Widely Tunable 4th Order Switched Gm-C Band-Pass Filter Based on N-Path Filters

IEEE journal of solid-state circuits, 2012, Vol.47 (12), p.3105-3119

2012

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A 4 GHz Continuous-Time ΔΣ ADC With 70 dB DR and - 74 dBFS THD in 125 MHz BW

IEEE journal of solid-state circuits, 2011, Vol.46 (12), p.2857-2868

2011

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A 16-mW 78-dB SNDR 10-MHz BW CT ΔΣ ADC Using Residue-Cancelling VCO-Based Quantizer

IEEE journal of solid-state circuits, 2012, Vol.47 (12), p.2916-2927

2012

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A DC-to-1 GHz Tunable RF ΔΣ ADC Achieving DR= 74 dB and BW= 150 MHz at f0 = 450 MHz Using 550 mW

IEEE journal of solid-state circuits, 2012, Vol.47 (12), p.2888-2897

2012

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Design Techniques for Wideband Single-Bit Continuous-Time ΔΣ Modulators With FIR Feedback DACs

IEEE journal of solid-state circuits, 2012, Vol.47 (12), p.2865-2879

2012

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A 20-mW 640-MHz CMOS continuous-time ΣΔ ADC with 20-MHz signal bandwidth, 80-dB dynamic range and 12-bit ENOB

IEEE journal of solid-state circuits, 2006, Vol.41 (12), p.2641-2649

2006

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Co-design and refinement for safety critical systems

19th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2004. DFT 2004. Proceedings, 2004, p.78-86

2004

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A Third-Order DT ΔΣ Modulator Using Noise-Shaped Bi-Directional Single-Slope Quantizer

IEEE journal of solid-state circuits, 2011, Vol.46 (12), p.2882-2891

2011

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RF-to-Baseband Digitization in 40 nm CMOS With RF Bandpass ΔΣ Modulator and Polyphase Decimation Filter

IEEE journal of solid-state circuits, 2012, Vol.47 (4), p.990-1002

2012

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A 2 GHz Fractional-N Digital PLL with 1b Noise Shaping ΔΣ TDC

IEEE journal of solid-state circuits, 2012, Vol.47 (4), p.875-883

2012

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A 4.5-mW closed-loop ΔΣ micro-gravity CMOS SOI accelerometer

IEEE journal of solid-state circuits, 2006, Vol.41 (12), p.2983-2991

2006

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A 2.4 GHz Low-Power Sixth-Order RF Bandpass ΔΣ Converter in CMOS

IEEE journal of solid-state circuits, 2009, Vol.44 (11), p.2873-2880

2009

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A 212 MPixels/s 4096 × 2160p Multiview Video Encoder Chip for 3D/Quad Full HDTV Applications

IEEE journal of solid-state circuits, 2010, Vol.45 (1), p.46-58

2010

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A 0.5-μVrms 12-μW Wirelessly Powered Patch-Type Healthcare Sensor for Wearable Body Sensor Network

IEEE journal of solid-state circuits, 2010, Vol.45 (11), p.2356-2365

2010

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3-5 GHz 4-Channel UWB Beamforming Transmitter With 1° Scanning Resolution Through Calibrated Vernier Delay Line in 0.13-μm CMOS

IEEE journal of solid-state circuits, 2012, Vol.47 (12), p.3145-3159

2012

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A Spurious-Free Switching Buck Converter Achieving Enhanced Light-Load Efficiency by Using a ΔΣ-Modulator Controller With a Scalable Sampling Frequency

IEEE journal of solid-state circuits, 2012, Vol.47 (4), p.841-851

2012

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Characteristics of High-Jc GdBCO Coated Conductors Fabricated by the RCE-DR Process

IEEE transactions on applied superconductivity, 2013, Vol.23 (3)

2013

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A 16 MHz BW 75 dB DR CT ΔΣ ADC Compensated for More Than One Cycle Excess Loop Delay

IEEE journal of solid-state circuits, 2012, Vol.47 (8), p.1884-1895

2012

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Complementary Constant-gm Biasing of Nauta-Transconductors in Low-Power gm―C Filters to ±2% Accuracy Over Temperature

IEEE journal of solid-state circuits, 2013, Vol.48 (7), p.1585-1594

2013

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A 24-Channel, 300 Gb/s, 8.2 pJ/bit, Full-Duplex Fiber-Coupled Optical Transceiver Module Based on a Single Holey CMOS IC

Journal of lightwave technology, 2011, Vol.29 (1-4), p.542-553

2011

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A 128 x 128 Single-Photon Image Sensor With Column-Level 10-Bit Time-to-Digital Converter Array

A 12-Bit, 10-MHz Bandwidth, Continuous-Time ΣΔ ADC With a 5-Bit, 950-MS/s VCO-Based Quantizer

A Low-Noise Wide-BW 3.6-GHz Digital ΔΣ Fractional-N Frequency Synthesizer With a Noise-Shaping Time-to-Digital Converter and Quantization Noise Cancellation

A 2.1 M Pixels, 120 Frame/s CMOS Image Sensor With Column-Parallel ΔΣ ADC Architecture

A 12-Bit Vernier Ring Time-to-Digital Converter in 0.13 μm CMOS Technology

Widely Tunable 4th Order Switched Gm-C Band-Pass Filter Based on N-Path Filters

A 4 GHz Continuous-Time ΔΣ ADC With 70 dB DR and - 74 dBFS THD in 125 MHz BW

A 16-mW 78-dB SNDR 10-MHz BW CT ΔΣ ADC Using Residue-Cancelling VCO-Based Quantizer

A DC-to-1 GHz Tunable RF ΔΣ ADC Achieving DR= 74 dB and BW= 150 MHz at f0 = 450 MHz Using 550 mW

Design Techniques for Wideband Single-Bit Continuous-Time ΔΣ Modulators With FIR Feedback DACs

A 20-mW 640-MHz CMOS continuous-time ΣΔ ADC with 20-MHz signal bandwidth, 80-dB dynamic range and 12-bit ENOB

Co-design and refinement for safety critical systems

A Third-Order DT ΔΣ Modulator Using Noise-Shaped Bi-Directional Single-Slope Quantizer

RF-to-Baseband Digitization in 40 nm CMOS With RF Bandpass ΔΣ Modulator and Polyphase Decimation Filter

A 2 GHz Fractional-N Digital PLL with 1b Noise Shaping ΔΣ TDC

A 4.5-mW closed-loop ΔΣ micro-gravity CMOS SOI accelerometer

A 2.4 GHz Low-Power Sixth-Order RF Bandpass ΔΣ Converter in CMOS

A 212 MPixels/s 4096 × 2160p Multiview Video Encoder Chip for 3D/Quad Full HDTV Applications

A 0.5-μVrms 12-μW Wirelessly Powered Patch-Type Healthcare Sensor for Wearable Body Sensor Network

3-5 GHz 4-Channel UWB Beamforming Transmitter With 1° Scanning Resolution Through Calibrated Vernier Delay Line in 0.13-μm CMOS

A Spurious-Free Switching Buck Converter Achieving Enhanced Light-Load Efficiency by Using a ΔΣ-Modulator Controller With a Scalable Sampling Frequency

Characteristics of High-Jc GdBCO Coated Conductors Fabricated by the RCE-DR Process

A 16 MHz BW 75 dB DR CT ΔΣ ADC Compensated for More Than One Cycle Excess Loop Delay

Complementary Constant-gm Biasing of Nauta-Transconductors in Low-Power gm―C Filters to ±2% Accuracy Over Temperature

A 24-Channel, 300 Gb/s, 8.2 pJ/bit, Full-Duplex Fiber-Coupled Optical Transceiver Module Based on a Single Holey CMOS IC

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