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A Fully Fault-Tolerant Representation of Quantum Circuits

Reversible Computation, p.139-154

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Digital Noise-Cancellation Circuit Implementation Using Proposed Algorithm and Karnaugh Map in a MASH 2-1 Delta-Sigma Modulator

Journal of circuits, systems, and computers, 2022-07, Vol.31 (10)

2022

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Realization and Optimization of Quantum Equivalent Circuits of Reversible Combinational Circuits

Journal of computational and theoretical nanoscience, 2020-05, Vol.17 (5), p.2080-2084

2020

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VLSI implementation of low‐power cost‐efficient lossless ECG encoder design for wireless healthcare monitoring application

Electronics letters, 2013-01, Vol.49 (2), p.91-93

2013

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VLSI implementation of multiplier design using reversible logic gate

Analog integrated circuits and signal processing, 2023-04, Vol.115 (1), p.93-100

2023

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Designing an open-source application to record library gate counts in response to COVID-19

Journal of access services, 2022, Vol.19 (1), p.18-25

2022

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Design and implementation of image kernels using reversible logic gates

IET image processing, 2020-12, Vol.14 (16), p.4110-4121

2020

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A New Device-Parameter-Oriented DC Power Model for Symmetric Operation of Junctionless Double-Gate mosfet Working on Low-Power CMOS Subthreshold Logic Gates

IEEE transactions on nanotechnology, 2018-05, Vol.17 (3), p.424-431

2018

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New design approaches of reversible BCD encoder using Peres and Feynman gates

ICT Express , 2020, 6(1), , pp.38-42

2020

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Quantum-based algorithm and circuit design for bounded Knapsack optimization problem

Quantum information & computation, 2020-08, Vol.20 (9&10), p.766-786

2020

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A Novel Low Gate-Count Pipeline Topology With Multiplexer-Flip-Flops for Serial Link

IEEE transactions on circuits and systems. I, Regular papers, 2012-11, Vol.59 (11), p.2600-2610

2012

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VLSI architecture of lossless ECG compression design based on fuzzy decision and optimisation method for wearable devices

Electronics letters, 2015-09, Vol.51 (18), p.1409-1411

2015

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The Quantum Query Complexity of Read-Many Formulas

Algorithms – ESA 2012, p.337-348

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A Low gate count reconfigurable architecture for biomedical signal processing applications

SN applied sciences, 2021-04, Vol.3 (4), p.439, Article 439

2021

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REVS: A Tool for Space-Optimized Reversible Circuit Synthesis

Reversible Computation, p.90-101

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Area and power-efficient variable-length fast Fourier transform for MR-OFDM physical layer of IEEE 802.15.4-g

Chronic diseases and translational medicine, 2020-09, Vol.14 (5), p.193-200

2020

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Light-weight configurable architecture for QRS detection

Chronic diseases and translational medicine, 2019-03, Vol.13 (2), p.70-77

2019

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Ultra-low-cost colour demosaicking VLSI design for real-time video applications

Electronics letters, 2014-10, Vol.50 (22), p.1585-1587

2014

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Design of integer motion estimator of HEVC for asymmetric motion-partitioning mode and 4K-UHD

Electronics letters, 2013-08, Vol.49 (18), p.1142-1143

2013

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Data Privacy and Academic Libraries: Non-PII, PII, and Librarians' Reflections (Part 2)

Journal of library administration, 2019-10, Vol.59 (7), p.768-785

2019

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A switch-source cell-based cascaded multilevel inverter topology with minimum number of power electronics components

Transactions of the Institute of Measurement and Control, 2021-03, Vol.43 (5), p.1212-1225

2021

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Design of a novel energy efficient topology for maximum magnitude generator

Chronic diseases and translational medicine, 2016-05, Vol.10 (3), p.93-101

2016

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There is a Relationship between Resource Expenditures and Reference Transactions in Academic Libraries. A Review of: Dubnjakovic, A. (2012). Electronic resource expenditure and the decline in reference transaction statistics in academic libraries. Journal of Academic Librarianship, 38(2), 94-100. doi:10.1016/j.acalib.2012.01.001

Evidence based library and information practice, 2013-03, Vol.8 (1), p.87-89

Annie M. Hughes

2013

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Efficient Three Variables Reversible Logic Synthesis Using Mixed-polarity Toffoli Gate

Procedia computer science, 2015, Vol.70, p.362-368

2015

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Variable length mixed radix MDC FFT/IFFT processor for MIMO-OFDM application

Chronic diseases and translational medicine, 2018-01, Vol.12 (1), p.9-19

2018

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A Fully Fault-Tolerant Representation of Quantum Circuits

Digital Noise-Cancellation Circuit Implementation Using Proposed Algorithm and Karnaugh Map in a MASH 2-1 Delta-Sigma Modulator

Realization and Optimization of Quantum Equivalent Circuits of Reversible Combinational Circuits

VLSI implementation of low‐power cost‐efficient lossless ECG encoder design for wireless healthcare monitoring application

VLSI implementation of multiplier design using reversible logic gate

Designing an open-source application to record library gate counts in response to COVID-19

Design and implementation of image kernels using reversible logic gates

A New Device-Parameter-Oriented DC Power Model for Symmetric Operation of Junctionless Double-Gate mosfet Working on Low-Power CMOS Subthreshold Logic Gates

New design approaches of reversible BCD encoder using Peres and Feynman gates

Quantum-based algorithm and circuit design for bounded Knapsack optimization problem

A Novel Low Gate-Count Pipeline Topology With Multiplexer-Flip-Flops for Serial Link

VLSI architecture of lossless ECG compression design based on fuzzy decision and optimisation method for wearable devices

The Quantum Query Complexity of Read-Many Formulas

A Low gate count reconfigurable architecture for biomedical signal processing applications

REVS: A Tool for Space-Optimized Reversible Circuit Synthesis

Area and power-efficient variable-length fast Fourier transform for MR-OFDM physical layer of IEEE 802.15.4-g

Light-weight configurable architecture for QRS detection

Ultra-low-cost colour demosaicking VLSI design for real-time video applications

Design of integer motion estimator of HEVC for asymmetric motion-partitioning mode and 4K-UHD

Data Privacy and Academic Libraries: Non-PII, PII, and Librarians' Reflections (Part 2)

A switch-source cell-based cascaded multilevel inverter topology with minimum number of power electronics components

Design of a novel energy efficient topology for maximum magnitude generator

Efficient Three Variables Reversible Logic Synthesis Using Mixed-polarity Toffoli Gate

Variable length mixed radix MDC FFT/IFFT processor for MIMO-OFDM application

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