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A Process-Adaptive Cell-Based Cyclic Time-to-Digital Converter Using One-Way Varactor Cells

IEEE transactions on very large scale integration (VLSI) systems, 2023-03, Vol.31 (3), p.1-12

2023

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A 110-nm CMOS 0.7-V Input Transient-Enhanced Digital Low-Dropout Regulator With 99.98% Current Efficiency at 80-mA Load

IEEE transactions on very large scale integration (VLSI) systems, 2015-07, Vol.23 (7), p.1281-1286

2015

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CMOS time-to-digital converters for mixed-mode signal processing

Journal of engineering (Stevenage, England), 2014-04, Vol.2014 (4), p.140-154

Yuan, Fei

2014

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Analysis and Design of a New 10-Bit High Accuracy and Resolution TDC by Elimination of Offset Voltage and Parasitic Capacitors Effects

Journal of circuits, systems, and computers, 2019-06, Vol.28 (6), p.1950095

2019

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A Novel Cyclic Time to Digital Converter Based on Triple-Slope Interpolation and Time Amplification

Radioengineering, 2015-09, Vol.24 (3), p.800-807

2015

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2μs row time 12-bit column-parallel single slope ADC for high-speed CMOS image sensor

Microelectronics, 2023-05, Vol.135, p.105768, Article 105768

2023

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An 800 kS/s 1.83 fJ/conv. 12b ADC via Voltage Successive Approximation and Gated Cyclic Vernier Time Digitization

2024 IEEE International Symposium on Circuits and Systems (ISCAS), 2024, p.1-5

2024

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Just-Enough Strategy for Accurate Clock Jitter Measurement Using A Cyclic Time-to-Digital Converter

2022 19th International SoC Design Conference (ISOCC), 2022, p.45-46

2022

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A 0.013 mm² 3.2-ns Input Range 10-Bit Cyclic Time-to-Digital Converter Using Gated Ring Oscillator With Phase Domain Reset in 65-nm CMOS

IEEE transactions on circuits and systems. II, Express briefs, 2024-08, Vol.71 (8), p.3635-3639

2024

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A Resolution-Tunable Low Power Time-to-Digital Converter with an Improved ADDLL Based on a Cyclic Pulse Ring Oscillator

IEEE transactions on instrumentation and measurement, 2023-01, Vol.72, p.1-1

2023

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An 8.5 ps Resolution, Cyclic Vernier TDC Using a Stage-Gated Ring Oscillator and DWA-Based Dynamic Element Matching in 28 nm CMOS

IEEE transactions on instrumentation and measurement, 2022, Vol.71, p.1-12

2022

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A 4.7-ps Resolution Recirculating Cyclic Vernier TDC Using DWA-Based Mismatch Correction and a Register-Based Time Amplifier

IEEE transactions on instrumentation and measurement, 2023, Vol.72, p.1-13

2023

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Three-Step Cyclic Vernier TDC Using a Pulse-Shrinking Inverter-Assisted Residue Quantizer for Low-Complexity Resolution Enhancement

IEEE transactions on instrumentation and measurement, 2021, Vol.70, p.1-12

2021

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Cost-Effective Time-to-Digital Converter Using Time-Residue Feedback

IEEE transactions on industrial electronics (1982), 2017-06, Vol.64 (6), p.4690-4700

2017

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Data Conversion With Subgate-Delay Time Resolution Using Cyclic-Coupled Ring Oscillators

IEEE transactions on very large scale integration (VLSI) systems, 2021-01, Vol.29 (1), p.203-214

2021

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A 100-750 MS/s 11-Bit Time-to-Digital Converter With Cyclic-Coupled Ring Oscillator

IEEE access, 2021, Vol.9, p.48147-48156

2021

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Compact algorithmic time-to-digital converter

Electronics letters, 2015-02, Vol.51 (3), p.213-215

2015

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Design of Cyclic-Coupled Ring Oscillators with Guaranteed Maximal Phase Resolution

2022 IEEE International Symposium on Circuits and Systems (ISCAS), 2022, p.1453-1456

2022

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An All-Digital, Cyclic and Synthesizable TDC in the ADPLL-Based Clocking Digital Systems for Multidomain Power Management

Applied Mechanics and Materials, 2014-07, Vol.597 (Advance Materials Development and Applied Mechanics), p.515-518

2014

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A Low Power, Small Area Cyclic Time-to-Digital Converter in All-Digital PLL for DVB-S2 Application

JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, 2013, 13(2), 50, pp.145-151

2013

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A polynomial scheduling algorithm for IEEE 802.15.4/ ZigBee cluster tree WSN with one collision domain and period crossing constraint

Proceedings of the 2014 IEEE Emerging Technology and Factory Automation (ETFA), 2014, p.1-8

2014

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A 120-dB Dynamic-Range, 24-ps-to-781-ps Resolution Reconfigurable Cyclic TDC Based on a 2× Time Amplifier for LiDAR Applications

2023 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA), 2023, p.156-157

2023

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A scalable time-domain biosensor array using a capacitor-less CMATC and logarithmic cyclic time-attenuation-based TDC with discharge acceleration for high-spatial-resolution bio-imaging

2017 24th IEEE International Conference on Electronics, Circuits and Systems (ICECS), 2017, p.406-409

2017

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A novel Doppler shift estimation algorithm for OFDM-based transform domain communication systems

2012 IEEE 11th International Conference on Signal Processing, 2012, Vol.2, p.1449-1453

2012

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A new high-resolution, temperature-compensated cyclic time-to-digital converter

2008 International SoC Design Conference, 2008, Vol.1, p.I-82-I-85

2008

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A Process-Adaptive Cell-Based Cyclic Time-to-Digital Converter Using One-Way Varactor Cells

A 110-nm CMOS 0.7-V Input Transient-Enhanced Digital Low-Dropout Regulator With 99.98% Current Efficiency at 80-mA Load

CMOS time-to-digital converters for mixed-mode signal processing

Analysis and Design of a New 10-Bit High Accuracy and Resolution TDC by Elimination of Offset Voltage and Parasitic Capacitors Effects

A Novel Cyclic Time to Digital Converter Based on Triple-Slope Interpolation and Time Amplification

2μs row time 12-bit column-parallel single slope ADC for high-speed CMOS image sensor

An 800 kS/s 1.83 fJ/conv. 12b ADC via Voltage Successive Approximation and Gated Cyclic Vernier Time Digitization

Just-Enough Strategy for Accurate Clock Jitter Measurement Using A Cyclic Time-to-Digital Converter

A 0.013 mm² 3.2-ns Input Range 10-Bit Cyclic Time-to-Digital Converter Using Gated Ring Oscillator With Phase Domain Reset in 65-nm CMOS

A Resolution-Tunable Low Power Time-to-Digital Converter with an Improved ADDLL Based on a Cyclic Pulse Ring Oscillator

An 8.5 ps Resolution, Cyclic Vernier TDC Using a Stage-Gated Ring Oscillator and DWA-Based Dynamic Element Matching in 28 nm CMOS

A 4.7-ps Resolution Recirculating Cyclic Vernier TDC Using DWA-Based Mismatch Correction and a Register-Based Time Amplifier

Three-Step Cyclic Vernier TDC Using a Pulse-Shrinking Inverter-Assisted Residue Quantizer for Low-Complexity Resolution Enhancement

Cost-Effective Time-to-Digital Converter Using Time-Residue Feedback

Data Conversion With Subgate-Delay Time Resolution Using Cyclic-Coupled Ring Oscillators

A 100-750 MS/s 11-Bit Time-to-Digital Converter With Cyclic-Coupled Ring Oscillator

Compact algorithmic time-to-digital converter

Design of Cyclic-Coupled Ring Oscillators with Guaranteed Maximal Phase Resolution

An All-Digital, Cyclic and Synthesizable TDC in the ADPLL-Based Clocking Digital Systems for Multidomain Power Management

A Low Power, Small Area Cyclic Time-to-Digital Converter in All-Digital PLL for DVB-S2 Application

A polynomial scheduling algorithm for IEEE 802.15.4/ ZigBee cluster tree WSN with one collision domain and period crossing constraint

A 120-dB Dynamic-Range, 24-ps-to-781-ps Resolution Reconfigurable Cyclic TDC Based on a 2× Time Amplifier for LiDAR Applications

A scalable time-domain biosensor array using a capacitor-less CMATC and logarithmic cyclic time-attenuation-based TDC with discharge acceleration for high-spatial-resolution bio-imaging

A novel Doppler shift estimation algorithm for OFDM-based transform domain communication systems

A new high-resolution, temperature-compensated cyclic time-to-digital converter

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