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A Reconfigurable Streaming Deep Convolutional Neural Network Accelerator for Internet of Things

IEEE transactions on circuits and systems. I, Regular papers, 2018-01, Vol.65 (1), p.198-208

2018

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XNOR Neural Engine: A Hardware Accelerator IP for 21.6-fJ/op Binary Neural Network Inference

IEEE transactions on computer-aided design of integrated circuits and systems, 2018-11, Vol.37 (11), p.2940-2951

2018

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Embedded Streaming Deep Neural Networks Accelerator With Applications

IEEE transaction on neural networks and learning systems, 2017-07, Vol.28 (7), p.1572-1583

2017

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Corrigendum to “An Impulse-C Hardware Accelerator for Packet Classification Based on Fine/Coarse Grain Optimization”

International Journal of Reconfigurable Computing, 2018-01, Vol.2018 (2018), p.1-1

2018

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A Variable-Size FFT Hardware Accelerator Based on Matrix Transposition

IEEE transactions on very large scale integration (VLSI) systems, 2018-10, Vol.26 (10), p.1953-1966

2018

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Scalable GPU Virtualization with Dynamic Sharing of Graphics Memory Space

IEEE transactions on parallel and distributed systems, 2018-08, Vol.29 (8), p.1823-1836

2018

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Quantization aware approximate multiplier and hardware accelerator for edge computing of deep learning applications

Integration (Amsterdam), 2021-11, Vol.81, p.268-279

2021

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Growth velocity in very preterm infants and body fat accrual at term-equivalent age

Pediatrics (Evanston), 2019-08, Vol.144 (2_MeetingAbstract), p.640-640

2019

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Mechanical stress analysis during a quench in CLIQ protected 16 T dipole magnets designed for the future circular collider

Physica. C, Superconductivity, 2018-07, Vol.550, p.27-34

2018

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Image Recognition Accelerator Design Using In-Memory Processing

IEEE MICRO, 2019-01, Vol.39 (1), p.17-23

2019

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A Novel and Efficient Hardware Accelerator Architecture for Signal Normalization

Circuits, systems, and signal processing, 2020-05, Vol.39 (5), p.2425-2441

2020

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Improving Performance of Hardware Accelerators by Optimizing Data Movement: A Bioinformatics Case Study

Electronics (Basel), 2023-01, Vol.12 (3), p.586

2023

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Hardware Accelerator for Probabilistic Inference in 65-nm CMOS

IEEE transactions on very large scale integration (VLSI) systems, 2016-03, Vol.24 (3), p.837-845

2016

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Booth Encoded Bit-Serial Multiply-Accumulate Units with Improved Area and Energy Efficiencies

Electronics (Basel), 2023-05, Vol.12 (10), p.2177

2023

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Low-Power Automatic Speech Recognition Through a Mobile GPU and a Viterbi Accelerator

IEEE MICRO, 2017, Vol.37 (1), p.22-29

2017

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Neuronal filtering of multiplexed odour representations

Nature (London), 2011-11, Vol.479 (7374), p.493-498

2011

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A Hardware Accelerator for Tracing Garbage Collection

IEEE MICRO, 2019-05, Vol.39 (3), p.38-46

2019

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Aspects of target optimization for ADS with light ion beams at energies below 0.5 AGeV

Progress in nuclear energy (New series), 2020-02, Vol.120, p.103221, Article 103221

2020

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Programming for High-Performance Computing on Edge Accelerators

Mathematics (Basel), 2023-02, Vol.11 (4), p.1055

Kang, Pilsung

2023

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CaFPGA: An automatic generation model for CNN accelerator

Microprocessors and microsystems, 2018-07, Vol.60, p.196-206

2018

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TELEPORT: Hardware/software alternative to CUDA shared memory programming

Microprocessors and microsystems, 2018-11, Vol.63, p.169-181

2018

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Dendrite Net with Acceleration Module for Faster Nonlinear Mapping and System Identification

Mathematics (Basel), 2022-12, Vol.10 (23), p.4477

2022

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Tuning the DARHT Long-Pulse Linear Induction Accelerator

IEEE transactions on plasma science, 2013-10, Vol.41 (10), p.2774-2780

Ekdahl, Carl

2013

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Enhancement of Video Streaming QoE by Considering Burst Loss in Wireless LANs

IEICE transactions on communications, 2018-07, Vol.E101.B (7), p.1653-1660

2018

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The SARC Architecture

IEEE MICRO, 2010-09, Vol.30 (5), p.16-29

2010

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A Reconfigurable Streaming Deep Convolutional Neural Network Accelerator for Internet of Things

XNOR Neural Engine: A Hardware Accelerator IP for 21.6-fJ/op Binary Neural Network Inference

Embedded Streaming Deep Neural Networks Accelerator With Applications

Corrigendum to “An Impulse-C Hardware Accelerator for Packet Classification Based on Fine/Coarse Grain Optimization”

A Variable-Size FFT Hardware Accelerator Based on Matrix Transposition

Scalable GPU Virtualization with Dynamic Sharing of Graphics Memory Space

Quantization aware approximate multiplier and hardware accelerator for edge computing of deep learning applications

Growth velocity in very preterm infants and body fat accrual at term-equivalent age

Mechanical stress analysis during a quench in CLIQ protected 16 T dipole magnets designed for the future circular collider

Image Recognition Accelerator Design Using In-Memory Processing

A Novel and Efficient Hardware Accelerator Architecture for Signal Normalization

Improving Performance of Hardware Accelerators by Optimizing Data Movement: A Bioinformatics Case Study

Hardware Accelerator for Probabilistic Inference in 65-nm CMOS

Booth Encoded Bit-Serial Multiply-Accumulate Units with Improved Area and Energy Efficiencies

Low-Power Automatic Speech Recognition Through a Mobile GPU and a Viterbi Accelerator

Neuronal filtering of multiplexed odour representations

A Hardware Accelerator for Tracing Garbage Collection

Aspects of target optimization for ADS with light ion beams at energies below 0.5 AGeV

Programming for High-Performance Computing on Edge Accelerators

CaFPGA: An automatic generation model for CNN accelerator

TELEPORT: Hardware/software alternative to CUDA shared memory programming

Dendrite Net with Acceleration Module for Faster Nonlinear Mapping and System Identification

Tuning the DARHT Long-Pulse Linear Induction Accelerator

Enhancement of Video Streaming QoE by Considering Burst Loss in Wireless LANs

The SARC Architecture

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