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Saturation RRAM Leveraging Bit-Level Sparsity Resulting from Term Quantization

2021 IEEE International Symposium on Circuits and Systems (ISCAS), 2021, p.1-5

2021

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IEEE_Xplore

A 440-μW, 109.8-dB DR, 106.5-dB SNDR Discrete-Time Zoom ADC With a 20-kHz BW

IEEE journal of solid-state circuits, 2021-04, Vol.56 (4), p.1207-1215

2021

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IEEE_Xplore

Signal Reconstruction by Phase Retrieval and Optical Backpropagation in Phase-Diverse Photonic Time-Stretch Systems

Journal of lightwave technology, 2007-10, Vol.25 (10), p.3017-3027

2007

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IEEE_Xplore

A Fully Bit-Flexible Computation in Memory Macro Using Multi-Functional Computing Bit Cell and Embedded Input Sparsity Sensing

IEEE journal of solid-state circuits, 2023-05, Vol.58 (5), p.1-9

2023

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IEEE_Xplore

Crystalline Selenium Layer Stacked Image Sensors With Pixel-Parallel A/D Converters Toward Photon Counting

IEEE transactions on electron devices, 2022-06, Vol.69 (6), p.2894-2899

2022

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IEEE_Xplore

The Analog Behavior of Pseudo Digital Ring Oscillators Used in VCO ADCs

IEEE transactions on circuits and systems. I, Regular papers, 2021-07, Vol.68 (7), p.2827-2840

2021

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Current-Detection-Independent Dead-Time Compensation Method Based on Terminal Voltage A/D Conversion for PWM VSI

IEEE transactions on industrial electronics (1982), 2017-10, Vol.64 (10), p.7689-7699

2017

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IEEE_Xplore

A 280 \mu W Dynamic Zoom ADC With 120 dB DR and 118 dB SNDR in 1 kHz BW

IEEE journal of solid-state circuits, 2018-12, Vol.53 (12), p.3497-3507

2018

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IEEE_Xplore

A Current Calibration Circuit for A 14-bit Column-Parallel Dual-Ramp Single-Slope ADC in Infrared Image Sensors

IEEE transactions on circuits and systems. II, Express briefs, 2024-07, p.1-1

2024

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IEEE_Xplore

Event-Driven Data Acquisition and Digital Signal Processing-A Tutorial

IEEE transactions on circuits and systems. II, Express briefs, 2010-08, Vol.57 (8), p.577-581

Tsividis, Y

2010

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IEEE_Xplore

A 12-GS/s 81-mW 5-bit Time-Interleaved Flash ADC With Background Timing Skew Calibration

IEEE journal of solid-state circuits, 2011-04, Vol.46 (4), p.838-847

2011

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IEEE_Xplore

NeuADC: Neural Network-Inspired Synthesizable Analog-to-Digital Conversion

IEEE transactions on computer-aided design of integrated circuits and systems, 2020-09, Vol.39 (9), p.1841-1854

2020

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IEEE_Xplore

A Continuous-Time Zoom ADC for Low-Power Audio Applications

IEEE journal of solid-state circuits, 2020-04, Vol.55 (4), p.1023-1031

2020

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IEEE_Xplore

A High-Resolution Low-Power Incremental \Sigma\Delta ADC With Extended Range for Biosensor Arrays

IEEE journal of solid-state circuits, 2010-06, Vol.45 (6), p.1099-1110

2010

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IEEE_Xplore

A 6.3 μW 20 bit Incremental Zoom-ADC with 6 ppm INL and 1 μV Offset

IEEE journal of solid-state circuits, 2013-12, Vol.48 (12), p.3019-3027

2013

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An 8-Gs/s 12-Bit TIADC System With Real-Time Broadband Mismatch Error Correction

IEEE transactions on nuclear science, 2018-12, Vol.65 (12), p.2892-2900

2018

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IEEE_Xplore

Design and Implementation of Decimation Filter for 13-bit Sigma-Delta ADC Based on FPGA

Tikrit journal of engineering sciences, 2022-03, Vol.23 (2), p.21-28

2022

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Data Compression Versus Signal Fidelity Tradeoff in Wired-OR Analog-to-Digital Compressive Arrays for Neural Recording

IEEE transactions on biomedical circuits and systems, 2023-08, Vol.PP (4), p.1-15

2023

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IEEE_Xplore

A Methodology to Teach Advanced A/D Converters, Combining Digital Signal Processing and Microelectronics Perspectives

IEEE transactions on education, 2010-08, Vol.53 (3), p.471-483

2010

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IEEE_Xplore

A 10 MHz Bandwidth, 70 dB SNDR Continuous Time Delta-Sigma Modulator With Digitally Improved Reconfigurable Blocker Rejection

IEEE journal of solid-state circuits, 2016-03, Vol.51 (3), p.660-670

2016

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IEEE_Xplore

An Asynchronous Delta-Modulator Based A/D Converter for an Electronic System Prototyping Platform

IEEE transactions on circuits and systems. I, Regular papers, 2016-06, Vol.63 (6), p.751-762

2016

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IEEE_Xplore

High-speed two-step single-slope ADC using multi-sampling with partial conversion

Electronics letters, 2015-02, Vol.51 (4), p.325-327

2015

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Design of Human Motion Signal Gathering System Based on USB 2.0

Bioautomation, 2018-12, Vol.22 (4), p.325-336

Bai, Yongheng

2018

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A low power offset voltage calibration method for flash ADCs

Integration (Amsterdam), 2023-01, Vol.88, p.58-69

2023

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A Continuous-Time Delta-Sigma Modulator for RF Subsampling Receivers

IEEE transactions on circuits and systems. II, Express briefs, 2012-05, Vol.59 (5), p.272-276

2012

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IEEE_Xplore

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Saturation RRAM Leveraging Bit-Level Sparsity Resulting from Term Quantization

A 440-μW, 109.8-dB DR, 106.5-dB SNDR Discrete-Time Zoom ADC With a 20-kHz BW

Signal Reconstruction by Phase Retrieval and Optical Backpropagation in Phase-Diverse Photonic Time-Stretch Systems

A Fully Bit-Flexible Computation in Memory Macro Using Multi-Functional Computing Bit Cell and Embedded Input Sparsity Sensing

Crystalline Selenium Layer Stacked Image Sensors With Pixel-Parallel A/D Converters Toward Photon Counting

The Analog Behavior of Pseudo Digital Ring Oscillators Used in VCO ADCs

Current-Detection-Independent Dead-Time Compensation Method Based on Terminal Voltage A/D Conversion for PWM VSI

A 280 \mu W Dynamic Zoom ADC With 120 dB DR and 118 dB SNDR in 1 kHz BW

A Current Calibration Circuit for A 14-bit Column-Parallel Dual-Ramp Single-Slope ADC in Infrared Image Sensors

Event-Driven Data Acquisition and Digital Signal Processing-A Tutorial

A 12-GS/s 81-mW 5-bit Time-Interleaved Flash ADC With Background Timing Skew Calibration

NeuADC: Neural Network-Inspired Synthesizable Analog-to-Digital Conversion

A Continuous-Time Zoom ADC for Low-Power Audio Applications

A High-Resolution Low-Power Incremental \Sigma\Delta ADC With Extended Range for Biosensor Arrays

A 6.3 μW 20 bit Incremental Zoom-ADC with 6 ppm INL and 1 μV Offset

An 8-Gs/s 12-Bit TIADC System With Real-Time Broadband Mismatch Error Correction

Design and Implementation of Decimation Filter for 13-bit Sigma-Delta ADC Based on FPGA

Data Compression Versus Signal Fidelity Tradeoff in Wired-OR Analog-to-Digital Compressive Arrays for Neural Recording

A Methodology to Teach Advanced A/D Converters, Combining Digital Signal Processing and Microelectronics Perspectives

A 10 MHz Bandwidth, 70 dB SNDR Continuous Time Delta-Sigma Modulator With Digitally Improved Reconfigurable Blocker Rejection

An Asynchronous Delta-Modulator Based A/D Converter for an Electronic System Prototyping Platform

High-speed two-step single-slope ADC using multi-sampling with partial conversion

Design of Human Motion Signal Gathering System Based on USB 2.0

A low power offset voltage calibration method for flash ADCs

A Continuous-Time Delta-Sigma Modulator for RF Subsampling Receivers

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