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2.5D Heterogeneous Integration for Silicon Photonics Engines in Optical Transceivers

IEEE journal of selected topics in quantum electronics, 2023, Vol.29 (3: Photon. Elec. Co-Inte. and Adv. Trans. Print.), p.1-9

2023

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A 6.4-Gbps 0.41-pJ/b fully-digital die-to-die interconnect PHY for silicon interposer based 2.5D integration

Integration (Amsterdam), 2024-05, Vol.96, p.102170, Article 102170

2024

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2.5D Root of Trust: Secure System-Level Integration of Untrusted Chiplets

IEEE transactions on computers, 2020-11, Vol.69 (11), p.1611-1625

2020

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A 2.5D Integrated Voltage Regulator Using Coupled-Magnetic-Core Inductors on Silicon Interposer

IEEE journal of solid-state circuits, 2013-01, Vol.48 (1), p.244-254

2013

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The model and influence factors of thermal interaction in chiplet 2.5D integration

2024 23rd IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm), 2024, p.1-5

2024

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Occamy: A 432-Core 28.1 DP-GFLOP/s/W 83% FPU Utilization Dual-Chiplet, Dual-HBM2E RISC-V-Based Accelerator for Stencil and Sparse Linear Algebra Computations with 8-to-64-bit Floating-Point Support in 12nm FinFET

2024 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2024, p.1-2

2024

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Double-sided silicon vias (DSSVs) interconnection for large-sized interposer fabrication

Microelectronics international, 2023-03, Vol.40 (2), p.81-88

2023

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Thermal Interaction and Cooling of Electronic Device with Chiplet 2.5D Integration

Applied sciences, 2024-09, Vol.14 (18), p.8114

2024

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Hardware Trojan Threats to Cache Coherence in Modern 2.5D Chiplet Systems

IEEE computer architecture letters, 2022-07, Vol.21 (2), p.133-136

2022

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GIA: A Reusable General Interposer Architecture for Agile Chiplet Integration

2022 IEEE/ACM International Conference On Computer Aided Design (ICCAD), 2022, p.1-9

2022

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A Scalable Die-to-Die Interconnect with Replay and Repair Schemes for 2.5D/3D Integration

2023 IEEE International Symposium on Circuits and Systems (ISCAS), 2023, p.1-5

2023

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Special Session: A Call to Standardize Chip-let Interconnect Testing

2022 IEEE 40th VLSI Test Symposium (VTS), 2022, p.1-3

Chakravarty, Sreejit

2022

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Enabling Scalable Disintegrated Computing Systems With AWGR-Based 2.5D Interconnection Networks

Journal of optical communications and networking, 2019-07, Vol.11 (7), p.333-346

2019

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Foundations of Heterogeneous Integration: An Industry-Based, 2.5D/3D Pathfinding and Co-Design Approach

Yazdani, Farhang

1st ed. 2018 edition., 2018

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Semiconductor Advanced Packaging

Lau, John H

1st Edition 2021, 2021

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HyDe: A Hybrid PCM/FeFET/SRAM Device-search for Optimizing Area and Energy-efficiencies in Analog IMC Platforms

IEEE journal on emerging and selected topics in circuits and systems, 2023-12, Vol.13 (4), p.1-1

2023

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Design, fabrication, and radio frequency property evaluation of a through-glass-via interposer for 2.5D radio frequency integration

Journal of micromechanics and microengineering, 2019-07, Vol.29 (7), p.75002

2019

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Spin coating modeling and planarization using fill patterns for advanced packaging technologies

2017 28th Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC), 2017, p.192-197

2017

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Design and Thermal Analysis of 2.5D and 3-D Integrated System of a CMOS Image Sensor and a Sparsity-Aware Accelerator for Autonomous Driving

IEEE journal of the Electron Devices Society, 2024, Vol.12, p.426-432

2024

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Flexible Interconnect Design Using a Mechanically-Focused, Multi-Objective Genetic Algorithm

Journal of microelectromechanical systems, 2018-08, Vol.27 (4), p.677-685

2018

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Novel Hybrid Bonding Technology Using Ultra-High Density Cu Nano-Pillar for Exascale 2.5D/3D Integration

IEEE electron device letters, 2016-01, Vol.37 (1), p.81-83

2016

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Investigation of Side Wall Loss for Development of 6 µm Microbumps for 3D/2.5D Integration

2024 IEEE 10th Electronics System-Integration Technology Conference (ESTC), 2024, p.1-6

2024

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Design of EMI and suppression structure based on bar-via

Microelectronics, 2021-06, Vol.112, p.105049, Article 105049

2021

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Thermal Cycling Reliability Analysis of 2.5D Chiplet Based on Silicon Interposer

2024 International Applied Computational Electromagnetics Society Symposium (ACES-China), 2024, p.1-3

2024

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Interconnection Design for a 2.5D Integrated RF Front-End Based on Silicon Interposer

2024 IEEE MTT-S International Wireless Symposium (IWS), 2024, p.1-3

2024

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2.5D Heterogeneous Integration for Silicon Photonics Engines in Optical Transceivers

A 6.4-Gbps 0.41-pJ/b fully-digital die-to-die interconnect PHY for silicon interposer based 2.5D integration

2.5D Root of Trust: Secure System-Level Integration of Untrusted Chiplets

A 2.5D Integrated Voltage Regulator Using Coupled-Magnetic-Core Inductors on Silicon Interposer

The model and influence factors of thermal interaction in chiplet 2.5D integration

Occamy: A 432-Core 28.1 DP-GFLOP/s/W 83% FPU Utilization Dual-Chiplet, Dual-HBM2E RISC-V-Based Accelerator for Stencil and Sparse Linear Algebra Computations with 8-to-64-bit Floating-Point Support in 12nm FinFET

Double-sided silicon vias (DSSVs) interconnection for large-sized interposer fabrication

Thermal Interaction and Cooling of Electronic Device with Chiplet 2.5D Integration

Hardware Trojan Threats to Cache Coherence in Modern 2.5D Chiplet Systems

GIA: A Reusable General Interposer Architecture for Agile Chiplet Integration

A Scalable Die-to-Die Interconnect with Replay and Repair Schemes for 2.5D/3D Integration

Special Session: A Call to Standardize Chip-let Interconnect Testing

Enabling Scalable Disintegrated Computing Systems With AWGR-Based 2.5D Interconnection Networks

Foundations of Heterogeneous Integration: An Industry-Based, 2.5D/3D Pathfinding and Co-Design Approach

Semiconductor Advanced Packaging

HyDe: A Hybrid PCM/FeFET/SRAM Device-search for Optimizing Area and Energy-efficiencies in Analog IMC Platforms

Design, fabrication, and radio frequency property evaluation of a through-glass-via interposer for 2.5D radio frequency integration

Spin coating modeling and planarization using fill patterns for advanced packaging technologies

Design and Thermal Analysis of 2.5D and 3-D Integrated System of a CMOS Image Sensor and a Sparsity-Aware Accelerator for Autonomous Driving

Flexible Interconnect Design Using a Mechanically-Focused, Multi-Objective Genetic Algorithm

Novel Hybrid Bonding Technology Using Ultra-High Density Cu Nano-Pillar for Exascale 2.5D/3D Integration

Investigation of Side Wall Loss for Development of 6 µm Microbumps for 3D/2.5D Integration

Design of EMI and suppression structure based on bar-via

Thermal Cycling Reliability Analysis of 2.5D Chiplet Based on Silicon Interposer

Interconnection Design for a 2.5D Integrated RF Front-End Based on Silicon Interposer

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