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Analysis on absolute conflict and relative conflict of land use in Xining metropolitan area under different scenarios in 2030 by PLUS and PFCI

Cities, 2023-06, Vol.137, p.104314, Article 104314

2023

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Metal oxide-resistive memory using graphene-edge electrodes

Nature communications, 2015-09, Vol.6 (1), p.8407-8407, Article 8407

2015

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A Compact Model for Metal-Oxide Resistive Random Access Memory With Experiment Verification

IEEE transactions on electron devices, 2016-05, Vol.63 (5), p.1884-1892

2016

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Verilog-A compact model for oxide-based resistive random access memory (RRAM)

2014 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), 2014, p.41-44

2014

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3-D Resistive Memory Arrays: From Intrinsic Switching Behaviors to Optimization Guidelines

IEEE transactions on electron devices, 2015-10, Vol.62 (10), p.3160-3167

2015

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1D Selection Device Using Carbon Nanotube FETs for High-Density Cross-Point Memory Arrays

IEEE transactions on electron devices, 2015-07, Vol.62 (7), p.2197-2204

2015

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Ultrafast Accelerated Retention Test Methodology for RRAM Using Micro Thermal Stage

IEEE electron device letters, 2017-07, Vol.38 (7), p.863-866

2017

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Ultra-Low Power Ni/HfO2/TiOx/TiN Resistive Random Access Memory With Sub-30-nA Reset Current

IEEE electron device letters, 2015-10, Vol.36 (10), p.1018-1020

2015

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Experimental study of plane electrode thickness scaling for 3D vertical resistive random access memory

Nanotechnology, 2013-11, Vol.24 (46), p.465201-465201

2013

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A novel robot hand-eye calibration method to enhance calibration accuracy based on the POE model

Advanced robotics, 2023-08, Vol.37 (16), p.1052-1062

2023

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3D vertical RRAM - Scaling limit analysis and demonstration of 3D array operation

2013 Symposium on VLSI Technology, 2013, p.T158-T159

2013

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Position-Based Robot Calibration and Compensation Using an Improved Adjoint Error Model

Journal of intelligent & robotic systems, 2023-07, Vol.108 (3), p.44, Article 44

2023

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An improved robot calibration method using the modified adjoint error model based on POE

Advanced robotics, 2020-10, Vol.34 (19), p.1229-1238

2020

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Hardness recognition of fruits and vegetables based on tactile array information of manipulator

Computers and electronics in agriculture, 2021-02, Vol.181, p.105959, Article 105959

2021

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Write disturb analyses on half-selected cells of cross-point RRAM arrays

2014 IEEE International Reliability Physics Symposium, 2014, p.MY.3.1-MY.3.4

2014

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Design guidelines for 3D RRAM cross-point architecture

2014 IEEE International Symposium on Circuits and Systems (ISCAS), 2014, p.421-424

2014

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VR map construction for orchard robot teleoperation based on dual-source positioning and sparse point cloud segmentation

Computers and electronics in agriculture, 2024-09, Vol.224, p.109187, Article 109187

2024

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A 1TnR array architecture using a one-dimensional selection device

2014 Symposium on VLSI Technology (VLSI-Technology): Digest of Technical Papers, 2014, p.1-2

2014

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Next-Generation Ultrahigh-Density 3-D Vertical Resistive Switching Memory (VRSM)-Part I: Accurate and Computationally Efficient Modeling

IEEE transactions on electron devices, 2019-12, Vol.66 (12), p.5139-5146

2019

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Towards high-speed, write-disturb tolerant 3D vertical RRAM arrays

2014 Symposium on VLSI Technology (VLSI-Technology): Digest of Technical Papers, 2014, p.1-2

2014

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Next-Generation Ultrahigh-Density 3-D Vertical Resistive Switching Memory (VRSM)-Part II: Design Guidelines for Device, Array, and Architecture

IEEE transactions on electron devices, 2019-12, Vol.66 (12), p.5147-5154

2019

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Resistive Switching Random Access Memory (RRAM): Analysis, Modeling, and Characterization Toward Practical Applications

Jiang, Zizhen

2020

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Achieving Sustainable Land Use Allocation in High-Altitude Area by 2030: Insights from Circle Structure and Scenario Predictions for Production–Living–Ecological Land in Xining Marginal Area, China

Land (Basel), 2024-08, Vol.13 (8), p.1241

2024

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Bidirectional Analog Conductance Modulation for RRAM-Based Neural Networks

IEEE transactions on electron devices, 2020-11, Vol.67 (11), p.4904-4910

2020

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8-Layer 3D Vertical Ru/AlOxNy/TiN RRAM with Mega-Ω Level LRS for Low Power and Ultrahigh-density Memory

2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2022, p.314-315

2022

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Analysis on absolute conflict and relative conflict of land use in Xining metropolitan area under different scenarios in 2030 by PLUS and PFCI

Metal oxide-resistive memory using graphene-edge electrodes

A Compact Model for Metal-Oxide Resistive Random Access Memory With Experiment Verification

Verilog-A compact model for oxide-based resistive random access memory (RRAM)

3-D Resistive Memory Arrays: From Intrinsic Switching Behaviors to Optimization Guidelines

1D Selection Device Using Carbon Nanotube FETs for High-Density Cross-Point Memory Arrays

Ultrafast Accelerated Retention Test Methodology for RRAM Using Micro Thermal Stage

Ultra-Low Power Ni/HfO2/TiOx/TiN Resistive Random Access Memory With Sub-30-nA Reset Current

Experimental study of plane electrode thickness scaling for 3D vertical resistive random access memory

A novel robot hand-eye calibration method to enhance calibration accuracy based on the POE model

3D vertical RRAM - Scaling limit analysis and demonstration of 3D array operation

Position-Based Robot Calibration and Compensation Using an Improved Adjoint Error Model

An improved robot calibration method using the modified adjoint error model based on POE

Hardness recognition of fruits and vegetables based on tactile array information of manipulator

Write disturb analyses on half-selected cells of cross-point RRAM arrays

Design guidelines for 3D RRAM cross-point architecture

VR map construction for orchard robot teleoperation based on dual-source positioning and sparse point cloud segmentation

A 1TnR array architecture using a one-dimensional selection device

Next-Generation Ultrahigh-Density 3-D Vertical Resistive Switching Memory (VRSM)-Part I: Accurate and Computationally Efficient Modeling

Towards high-speed, write-disturb tolerant 3D vertical RRAM arrays

Next-Generation Ultrahigh-Density 3-D Vertical Resistive Switching Memory (VRSM)-Part II: Design Guidelines for Device, Array, and Architecture

Resistive Switching Random Access Memory (RRAM): Analysis, Modeling, and Characterization Toward Practical Applications

Achieving Sustainable Land Use Allocation in High-Altitude Area by 2030: Insights from Circle Structure and Scenario Predictions for Production–Living–Ecological Land in Xining Marginal Area, China

Bidirectional Analog Conductance Modulation for RRAM-Based Neural Networks

8-Layer 3D Vertical Ru/AlOxNy/TiN RRAM with Mega-Ω Level LRS for Low Power and Ultrahigh-density Memory

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