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Design and Evaluation of a Spintronic In-Memory Processing Platform for Nonvolatile Data Encryption

IEEE transactions on computer-aided design of integrated circuits and systems, 2018-09, Vol.37 (9), p.1788-1801

2018

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Monolithic 3D integration of 2D transistors and vertical RRAMs in 1T–4R structure for high-density memory

Nature communications, 2023-09, Vol.14 (1), p.5952-5952, Article 5952

2023

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A tunable magnetic skyrmion neuron cluster for energy efficient artificial neural network

Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017, 2017, p.350-355

2017

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Exploring STT-MRAM Based In-Memory Computing Paradigm with Application of Image Edge Extraction

2017 IEEE International Conference on Computer Design (ICCD), 2017, p.439-446

2017

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Energy Efficient Reconfigurable Threshold Logic Circuit with Spintronic Devices

IEEE transactions on emerging topics in computing, 2017-04, Vol.5 (2), p.223-237

2017

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Low power in-memory computing based on dual-mode SOT-MRAM

2017 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED), 2017, p.1-6

2017

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Leveraging spintronic devices for ultra-low power in-memory computing: Logic and neural network

2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS), 2017, p.1109-1112

2017

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Parametric Noise Injection: Trainable Randomness to Improve Deep Neural Network Robustness Against Adversarial Attack

2019 IEEE/CVF Conference on Computer Vision and Pattern Recognition (CVPR), 2019, p.588-597

2019

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TBT: Targeted Neural Network Attack With Bit Trojan

2020 IEEE/CVF Conference on Computer Vision and Pattern Recognition (CVPR), 2020, p.13195-13204

2020

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Simultaneously Optimizing Weight and Quantizer of Ternary Neural Network Using Truncated Gaussian Approximation

2019 IEEE/CVF Conference on Computer Vision and Pattern Recognition (CVPR), 2019, p.11430-11438

2019

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Bit-Flip Attack: Crushing Neural Network With Progressive Bit Search

2019 IEEE/CVF International Conference on Computer Vision (ICCV), 2019, p.1211-1220

2019

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MRIMA: An MRAM-Based In-Memory Accelerator

IEEE transactions on computer-aided design of integrated circuits and systems, 2020-05, Vol.39 (5), p.1123-1136

2020

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A Progressive Subnetwork Searching Framework for Dynamic Inference

IEEE transaction on neural networks and learning systems, 2024-03, Vol.35 (3), p.1-12

2024

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IMCE: Energy-efficient bit-wise in-memory convolution engine for deep neural network

2018 23rd Asia and South Pacific Design Automation Conference (ASP-DAC), 2018, p.111-116

2018

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T-BFA: Targeted Bit-Flip Adversarial Weight Attack

IEEE transactions on pattern analysis and machine intelligence, 2022-11, Vol.44 (11), p.7928-7939

2022

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PIMA-logic: a novel processing-in-memory architecture for highly flexible and energy-efficient logic computation

Proceedings of the 55th Annual Design Automation Conference, 2018, p.1-6

2018

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Hybrid Spin-CMOS Polymorphic Logic Gate With Application in In-Memory Computing

IEEE transactions on magnetics, 2020-02, Vol.56 (2), p.1-15

2020

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Noise Injection Adaption: End-to-End ReRAM Crossbar Non-ideal Effect Adaption for Neural Network Mapping

2019 56th ACM/IEEE Design Automation Conference (DAC), 2019, p.1-6

2019

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Non-Structured DNN Weight Pruning-Is It Beneficial in Any Platform?

IEEE transaction on neural networks and learning systems, 2022-09, Vol.33 (9), p.4930-4944

2022

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An Efficient Logic Operation Scheduler for Minimizing Memory Footprint of In-Memory SIMD Computation

2024 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2024, p.1-2

2024

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A Fully Onchip Binarized Convolutional Neural Network FPGA Impelmentation with Accurate Inference

Proceedings of the International Symposium on Low Power Electronics and Design, 2018, p.1-6

2018

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2D MoS2-Based Threshold Switching Memristor for Artificial Neuron

IEEE electron device letters, 2020-06, Vol.41 (6), p.936-939

2020

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In-Memory Computing with Spintronic Devices

2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2017, p.683-688

2017

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T-BFA: T argeted B it- F lip Adversarial Weight A ttack

IEEE transactions on pattern analysis and machine intelligence, 2022-11, Vol.44 (11), p.7928-7939

2022

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Network-based multi-task learning models for biomarker selection and cancer outcome prediction

Bioinformatics, 2020-03, Vol.36 (6), p.1814-1822

2020

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Design and Evaluation of a Spintronic In-Memory Processing Platform for Nonvolatile Data Encryption

Monolithic 3D integration of 2D transistors and vertical RRAMs in 1T–4R structure for high-density memory

A tunable magnetic skyrmion neuron cluster for energy efficient artificial neural network

Exploring STT-MRAM Based In-Memory Computing Paradigm with Application of Image Edge Extraction

Energy Efficient Reconfigurable Threshold Logic Circuit with Spintronic Devices

Low power in-memory computing based on dual-mode SOT-MRAM

Leveraging spintronic devices for ultra-low power in-memory computing: Logic and neural network

Parametric Noise Injection: Trainable Randomness to Improve Deep Neural Network Robustness Against Adversarial Attack

TBT: Targeted Neural Network Attack With Bit Trojan

Simultaneously Optimizing Weight and Quantizer of Ternary Neural Network Using Truncated Gaussian Approximation

Bit-Flip Attack: Crushing Neural Network With Progressive Bit Search

MRIMA: An MRAM-Based In-Memory Accelerator

A Progressive Subnetwork Searching Framework for Dynamic Inference

IMCE: Energy-efficient bit-wise in-memory convolution engine for deep neural network

T-BFA: Targeted Bit-Flip Adversarial Weight Attack

PIMA-logic: a novel processing-in-memory architecture for highly flexible and energy-efficient logic computation

Hybrid Spin-CMOS Polymorphic Logic Gate With Application in In-Memory Computing

Noise Injection Adaption: End-to-End ReRAM Crossbar Non-ideal Effect Adaption for Neural Network Mapping

Non-Structured DNN Weight Pruning-Is It Beneficial in Any Platform?

An Efficient Logic Operation Scheduler for Minimizing Memory Footprint of In-Memory SIMD Computation

A Fully Onchip Binarized Convolutional Neural Network FPGA Impelmentation with Accurate Inference

2D MoS2-Based Threshold Switching Memristor for Artificial Neuron

In-Memory Computing with Spintronic Devices

T-BFA: T argeted B it- F lip Adversarial Weight A ttack

Network-based multi-task learning models for biomarker selection and cancer outcome prediction

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