UB Paderborn / Katalog / Suche / in CDI

Sortiert nach

Einfacher Volltextzugriff von (fast) überall

Installieren Sie die LibKey Nomad-Browsererweiterung und erhalten Sie von vielen Webseiten einfachen Zugriff auf lizenzierte Volltexte oder Open Access Publikationen. Mehr erfahren...

2-D Physics-Based Compact DC Modeling of Double-Gate Tunnel-FETs

IEEE transactions on electron devices, 2019-01, Vol.66 (1), p.132-138

2019

Volltextzugriff (PDF)

Negative Capacitance as Performance Booster for Tunnel FETs and MOSFETs: An Experimental Study

IEEE electron device letters, 2017-10, Vol.38 (10), p.1485-1488

2017

Volltextzugriff (PDF)

Diameter Scaling of Vertical Ge Gate- All-Around Nanowire pMOSFETs

IEEE transactions on electron devices, 2020-07, Vol.67 (7), p.2988-2994

2020

Volltextzugriff (PDF)

Toward Low‐Power Cryogenic Metal‐Oxide Semiconductor Field‐Effect Transistors

Physica status solidi. A, Applications and materials science, 2023-07, Vol.220 (13), p.n/a

2023

Volltextzugriff (PDF)

Vertical Ge Gate-All-Around Nanowire pMOSFETs With a Diameter Down to 20 nm

IEEE electron device letters, 2020-04, Vol.41 (4), p.533-536

2020

Volltextzugriff (PDF)

Heterosynaptic Plasticity and Neuromorphic Boolean Logic Enabled by Ferroelectric Polarization Modulated Schottky Diodes

Advanced electronic materials, 2023-03, Vol.9 (3), p.n/a

2023

Volltextzugriff (PDF)

Line and Point Tunneling in Scaled Si/SiGe Heterostructure TFETs

IEEE electron device letters, 2014-07, Vol.35 (7), p.699-701

2014

Volltextzugriff (PDF)

Schottky barrier tuning via dopant segregation in NiGeSn-GeSn contacts

Journal of applied physics, 2017-05, Vol.121 (20)

2017

Volltextzugriff (PDF)

Characteristics of Recessed-Gate TFETs With Line Tunneling

IEEE transactions on electron devices, 2018-02, Vol.65 (2), p.769-775

2018

Volltextzugriff (PDF)

Line Tunneling Dominating Charge Transport in SiGe/Si Heterostructure TFETs

IEEE transactions on electron devices, 2016-11, Vol.63 (11), p.4173-4178

2016

Volltextzugriff (PDF)

Subthreshold Behavior of Floating-Gate MOSFETs With Ferroelectric Capacitors

IEEE transactions on electron devices, 2018-10, Vol.65 (10), p.4641-4645

2018

Volltextzugriff (PDF)

Four-Terminal Ferroelectric Schottky Barrier Field Effect Transistors as Artificial Synapses for Neuromorphic Applications

IEEE journal of the Electron Devices Society, 2022, Vol.10, p.569-574

2022

Volltextzugriff (PDF)

Experimental I – V(T) and C – V Analysis of Si Planar p-TFETs on Ultrathin Body

IEEE transactions on electron devices, 2016-12, Vol.63 (12), p.5036-5040

2016

Volltextzugriff (PDF)

Impact of TFET Unidirectionality and Ambipolarity on the Performance of 6T SRAM Cells

IEEE journal of the Electron Devices Society, 2015-05, Vol.3 (3), p.223-232

2015

Volltextzugriff (PDF)

Benchmarking of Homojunction Strained-Si NW Tunnel FETs for Basic Analog Functions

IEEE transactions on electron devices, 2017-04, Vol.64 (4), p.1441-1448, Article 1441

2017

Volltextzugriff (PDF)

High Performance 5 nm Si Nanowire FETs with a Record Small SS = 2.3 mV/dec and High Transconductance at 5.5 K Enabled by Dopant Segregated Silicide Source/Drain

2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023, p.1-2

2023

Volltextzugriff (PDF)

Strained Si and SiGe Nanowire Tunnel FETs for Logic and Analog Applications

IEEE journal of the Electron Devices Society, 2015-05, Vol.3 (3), p.103-114

2015

Volltextzugriff (PDF)

Artificial Synapses Based on Ferroelectric Schottky Barrier Field-Effect Transistors for Neuromorphic Applications

ACS applied materials & interfaces, 2021-07, Vol.13 (27), p.32005-32012

2021

Volltextzugriff (PDF)

Strained Silicon Single Nanowire Gate-All-Around TFETs with Optimized Tunneling Junctions

Applied sciences, 2018-05, Vol.8 (5), p.670

2018

Volltextzugriff (PDF)

A T-Shaped SOI Tunneling Field-Effect Transistor With Novel Operation Modes

IEEE journal of the Electron Devices Society, 2019, Vol.7, p.1114-1118

2019

Volltextzugriff (PDF)

Steep Switching Si Nanowire p-FETs With Dopant Segregated Silicide Source/Drain at Cryogenic Temperature

IEEE electron device letters, 2022-08, Vol.43 (8), p.1187-1190

2022

Volltextzugriff (PDF)

Experimental Investigation of – Characteristics of Si Tunnel FETs

IEEE electron device letters, 2017-06, Vol.38 (6), p.818-821

2017

Volltextzugriff (PDF)

Improved performance of FDSOI FETs at cryogenic temperatures by optimizing ion implantation into silicide

Solid-state electronics, 2023-10, Vol.208, p.108733, Article 108733

2023

Volltextzugriff (PDF)

Cryogenic characteristics of UTBB SOI Schottky-Barrier MOSFETs

Solid-state electronics, 2022-08, Vol.194, p.108351, Article 108351

2022

Volltextzugriff (PDF)

Inverters With Strained Si Nanowire Complementary Tunnel Field-Effect Transistors

IEEE electron device letters, 2013-06, Vol.34 (6), p.813-815

2013

Volltextzugriff (PDF)

1 – 25 von 200

Suche als RSS-Feed

Suchergebnisse filtern

Filter anzeigen

Nur zeigen

Geprüft (Peer-Review)
(132)
Mit Volltextzugriff
(161)

Publikationsform

Sprache

Erscheinungsjahr

n.n

Thema

Science & Technology
(112)
Technology
(87)
Physics
(81)
Physical Sciences
(75)
Engineering
(65)
Engineering, Electrical & Electronic
(62)
Physics, Applied
(54)
Logic Gates
(36)
Exact Sciences And Technology
(27)
Silicon
(26)
Materials Science
(21)
Transistors
(20)
Mosfet
(17)
Physics, Condensed Matter
(17)
Tunneling
(17)
Materials Science, Multidisciplinary
(16)
Nanoscience & Nanotechnology
(15)
Science & Technology - Other Topics
(15)
Tfets
(14)
Junctions
(13)

15 weitere anzeigen...

Weniger anzeigen...

Neu hinzugefügt

... seit 30 Tagen
(1)
... seit 90 Tagen
(2)

Menü

Weitere Dienste

Einstellungen

2-D Physics-Based Compact DC Modeling of Double-Gate Tunnel-FETs

Negative Capacitance as Performance Booster for Tunnel FETs and MOSFETs: An Experimental Study

Diameter Scaling of Vertical Ge Gate- All-Around Nanowire pMOSFETs

Toward Low‐Power Cryogenic Metal‐Oxide Semiconductor Field‐Effect Transistors

Vertical Ge Gate-All-Around Nanowire pMOSFETs With a Diameter Down to 20 nm

Heterosynaptic Plasticity and Neuromorphic Boolean Logic Enabled by Ferroelectric Polarization Modulated Schottky Diodes

Line and Point Tunneling in Scaled Si/SiGe Heterostructure TFETs

Schottky barrier tuning via dopant segregation in NiGeSn-GeSn contacts

Characteristics of Recessed-Gate TFETs With Line Tunneling

Line Tunneling Dominating Charge Transport in SiGe/Si Heterostructure TFETs

Subthreshold Behavior of Floating-Gate MOSFETs With Ferroelectric Capacitors

Four-Terminal Ferroelectric Schottky Barrier Field Effect Transistors as Artificial Synapses for Neuromorphic Applications

Experimental I – V(T) and C – V Analysis of Si Planar p-TFETs on Ultrathin Body

Impact of TFET Unidirectionality and Ambipolarity on the Performance of 6T SRAM Cells

Benchmarking of Homojunction Strained-Si NW Tunnel FETs for Basic Analog Functions

High Performance 5 nm Si Nanowire FETs with a Record Small SS = 2.3 mV/dec and High Transconductance at 5.5 K Enabled by Dopant Segregated Silicide Source/Drain

Strained Si and SiGe Nanowire Tunnel FETs for Logic and Analog Applications

Artificial Synapses Based on Ferroelectric Schottky Barrier Field-Effect Transistors for Neuromorphic Applications

Strained Silicon Single Nanowire Gate-All-Around TFETs with Optimized Tunneling Junctions

A T-Shaped SOI Tunneling Field-Effect Transistor With Novel Operation Modes

Steep Switching Si Nanowire p-FETs With Dopant Segregated Silicide Source/Drain at Cryogenic Temperature

Experimental Investigation of – Characteristics of Si Tunnel FETs

Improved performance of FDSOI FETs at cryogenic temperatures by optimizing ion implantation into silicide

Cryogenic characteristics of UTBB SOI Schottky-Barrier MOSFETs

Inverters With Strained Si Nanowire Complementary Tunnel Field-Effect Transistors

Suchergebnisse filtern