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Single Event Effect Characterization of High Speed Serial JESD204B Data Receiver

Journal of physics. Conference series, 2019-11, Vol.1345 (2), p.22016

2019

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Total ionizing dose effects on data retention characteristics of 55nm SONOS flash

Journal of physics. Conference series, 2021-07, Vol.1983 (1), p.12061

2021

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A Fast-Lock Low-Jitter PLL Based Adaptive Bandwidth Technique

Journal of physics. Conference series, 2018-09, Vol.1087 (5), p.52029

2018

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Impact of Program/Erase Cycles, Total Ionizing Dose and Data Bake on Data Retention of 55nm SONOS Flash

Journal of physics. Conference series, 2021-05, Vol.1920 (1), p.12101

2021

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Total Ionizing Dose Influence on the Single-Event Multiple-Cell Upsets in 65-nm 6-T SRAM

IEEE transactions on nuclear science, 2019-06, Vol.66 (6), p.892-898

2019

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SEU and SET of 65 Bulk CMOS Flip-flops and Their Implications for RHBD

IEEE transactions on nuclear science, 2015-12, Vol.62 (6), p.2666-2672

2015

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A Study on High Density Gate-Oxide Anti-Fuse PROM Memory Cell Program Features

MATEC Web of Conferences, 2016, Vol.75, p.10004

2016

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Effects of driving capability on single-event transient of inverter in bulk FinFET Technology

Journal of physics. Conference series, 2024-08, Vol.2820 (1), p.012113

2024

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Design of a novel 12T radiation hardened memory cell tolerant to single event upsets (SEU)

2017 2nd IEEE International Conference on Integrated Circuits and Microsystems (ICICM), 2017, p.182-185

2017

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A low-voltage CMOS low-dropout regulator with novel capacitor-multiplier frequency compensation

2008 IEEE International Symposium on Circuits and Systems, 2008, p.2685-2688

2008

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A 8.0Gb/s source-series-terminated transmitter driver with 3 tap FFE for multi-standard applications in 65 nm CMOS

2016 International Conference on Control, Decision and Information Technologies (CoDIT), 2016, p.331-334

2016

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Single event transients of scan flip-flop and an SET-immune redundant delay filter (RDF)

2013 14th European Conference on Radiation and Its Effects on Components and Systems (RADECS), 2013, p.1-5

2013

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A 0.996mW 10GHz slicer with 20mV input resolution in 65nm CMOS

2016 China Semiconductor Technology International Conference (CSTIC), 2016, p.1-3

2016

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A four-interleaving HBD SRAM cell based on dual DICE for multiple node collection mitigation

Journal of semiconductors, 2015-11, Vol.36 (11), p.97-100

刘琳岳素格陆时进

2015

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Single event transient pulse width measurement of 65-nm bulk CMOS circuits

Journal of semiconductors, 2015-11, Vol.36 (11), p.93-96

岳素格张晓林赵馨远

2015

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Modeling and simulation of single-event effect in CMOS circuit

Journal of semiconductors, 2015-11, Vol.36 (11), p.15-24

岳素格张晓林赵元富刘琳王汉宁

2015

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A wide input voltage range, output-capacitorless linear voltage regulator in 0.25UM BCD process

2015 China Semiconductor Technology International Conference, 2015, p.1-4

2015

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Impact of gate shapes on single event transients

2014 IEEE International Conference on Electron Devices and Solid-State Circuits, 2014, p.1-2

2014

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GDNMOS design for ESD protection in submicron CMOS VLSI

2009 Asia Pacific Conference on Postgraduate Research in Microelectronics & Electronics (PrimeAsia), 2009, p.432-435

2009

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Single event soft error in advanced integrated circuit

Journal of semiconductors, 2015-11, Vol.36 (11), p.1-14

赵元富岳素格赵馨远陆时进边强王亮孙永姝

2015

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Evaluation of SEE on a 32-bit Microprocessor by Laser Test and Heavy Ion Test

Advanced Materials Research, 2015-05, Vol.1105, p.391-396

2015

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Analysis and RHBD technique of single event transients in PLLs

Journal of semiconductors, 2015-11, Vol.36 (11), p.73-74

韩志伟王亮岳素格韩兵杜守刚

2015

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Predictions for proton and heavy ions induced SEUs in 65 nm SRAMs

Journal of semiconductors, 2015-11, Vol.36 (11), p.69-72

杜守刚岳素格刘红侠范隆郑宏超

2015

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The investigation on sensitive mapping of memory cell in microprocessor

Journal of semiconductors, 2015-11, Vol.36 (11), p.44-47

于春青范隆岳素格陈茂鑫杜守刚郑宏超

2015

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The single-event effect evaluation technology for nano integrated circuits

Journal of semiconductors, 2015-11, Vol.36 (11), p.75-79

郑宏超赵元富岳素格范隆杜守刚陈茂鑫于春青

2015

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Single Event Effect Characterization of High Speed Serial JESD204B Data Receiver

Total ionizing dose effects on data retention characteristics of 55nm SONOS flash

A Fast-Lock Low-Jitter PLL Based Adaptive Bandwidth Technique

Impact of Program/Erase Cycles, Total Ionizing Dose and Data Bake on Data Retention of 55nm SONOS Flash

Total Ionizing Dose Influence on the Single-Event Multiple-Cell Upsets in 65-nm 6-T SRAM

SEU and SET of 65 Bulk CMOS Flip-flops and Their Implications for RHBD

A Study on High Density Gate-Oxide Anti-Fuse PROM Memory Cell Program Features

Effects of driving capability on single-event transient of inverter in bulk FinFET Technology

Design of a novel 12T radiation hardened memory cell tolerant to single event upsets (SEU)

A low-voltage CMOS low-dropout regulator with novel capacitor-multiplier frequency compensation

A 8.0Gb/s source-series-terminated transmitter driver with 3 tap FFE for multi-standard applications in 65 nm CMOS

Single event transients of scan flip-flop and an SET-immune redundant delay filter (RDF)

A 0.996mW 10GHz slicer with 20mV input resolution in 65nm CMOS

A four-interleaving HBD SRAM cell based on dual DICE for multiple node collection mitigation

Single event transient pulse width measurement of 65-nm bulk CMOS circuits

Modeling and simulation of single-event effect in CMOS circuit

A wide input voltage range, output-capacitorless linear voltage regulator in 0.25UM BCD process

Impact of gate shapes on single event transients

GDNMOS design for ESD protection in submicron CMOS VLSI

Single event soft error in advanced integrated circuit

Evaluation of SEE on a 32-bit Microprocessor by Laser Test and Heavy Ion Test

Analysis and RHBD technique of single event transients in PLLs

Predictions for proton and heavy ions induced SEUs in 65 nm SRAMs

The investigation on sensitive mapping of memory cell in microprocessor

The single-event effect evaluation technology for nano integrated circuits

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