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A 0.042-mm2 fully integrated analog PLL with stacked capacitor-inductor in 45nm CMOS

ESSCIRC 2008 - 34th European Solid-State Circuits Conference, 2008, p.94-97

2008

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A 0.044-mm 2 0.5-to-7-GHz Resistor-Plus-Source-Follower-Feedback Noise-Cancelling LNA Achieving a Flat NF of 3.3±0.45 dB

IEEE transactions on circuits and systems. II, Express briefs, 2019-01, Vol.66 (1), p.71-75

2019

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A 0.044-mm2 0.5-to-7-GHz Resistor-Plus-Source-Follower-Feedback Noise-Cancelling LNA Achieving a Flat NF of 3.3±0.45 dB

IEEE transactions on circuits and systems. II, Express briefs, 2019-01, Vol.66 (1), p.71-75

2019

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A 0.05- ^ 2.91-nJ/Decision Keyword-Spotting (KWS) Chip Featuring an Always-Retention 5T-SRAM in 28-nm CMOS

IEEE journal of solid-state circuits, 2023-07, p.1-10

2023

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A 0.05-mm 2 2.91-nJ/Decision Keyword-Spotting (KWS) Chip Featuring an Always-Retention 5T-SRAM in 28-nm CMOS

IEEE journal of solid-state circuits, 2024-02, Vol.59 (2), p.626-635

2024

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A 0.05-mm2 2.91-nJ/Decision Keyword-Spotting (KWS) Chip Featuring an Always-Retention 5T-SRAM in 28-nm CMOS

IEEE journal of solid-state circuits, 2024-02, Vol.59 (2), p.626

2024

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A 0.096-mm ^~1 -20-GHz Triple-Path Noise- Canceling Common-Gate Common-Source LNA With Dual Complementary pMOS-nMOS Configuration

IEEE transactions on microwave theory and techniques, 2020-01, Vol.68 (1), p.144-159

2020

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A 0.096-mm[Formula Omitted]–20-GHz Triple-Path Noise- Canceling Common-Gate Common-Source LNA With Dual Complementary pMOS–nMOS Configuration

IEEE transactions on microwave theory and techniques, 2020-01, Vol.68 (1), p.144

2020

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A 0.12-mm 2 1.2-to-2.4-mW 1.3-to-2.65-GHz Fractional-N Bang-Bang Digital PLL With 8-$\mu$ s Settling Time for Multi-ISM-Band ULP Radios

IEEE transactions on circuits and systems. I, Regular papers, 2019-09, Vol.66 (9), p.3307-3316

2019

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A 0.12-mm2 1.2-to-2.4-mW 1.3-to-2.65-GHz Fractional-N Bang-Bang Digital PLL With 8-[Formula Omitted]s Settling Time for Multi-ISM-Band ULP Radios

IEEE transactions on circuits and systems. I, Regular papers, 2019-01, Vol.66 (9), p.3307

2019

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A 0.12-mm2 1.2-to-2.4-mW 1.3-to-2.65-GHz Fractional-N Bang-Bang Digital PLL With 8- \mu s Settling Time for Multi-ISM-Band ULP Radios

IEEE transactions on circuits and systems. I, Regular papers, 2019-09, Vol.66 (9), p.3307-3316

2019

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A 0.15 /spl mu/m CMOS foundry technology with 0.1 /spl mu/m devices for high performance applications

2000 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.00CH37104), 2000, p.146-147

2000

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0.18 /spl mu/m metal gate fully-depleted SOI MOSFETs for advanced CMOS applications

1999 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.99CH36325), 1999, p.25-26

1999

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A 0.18-V 382-[Formula Omitted]W Bluetooth Low-Energy Receiver Front-End With 1.33-nW Sleep Power for Energy-Harvesting Applications in 28-nm CMOS

IEEE journal of solid-state circuits, 2018-01, Vol.53 (6), p.1618

2018

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A 0.18-V 382- \mu W Bluetooth Low-Energy Receiver Front-End With 1.33-nW Sleep Power for Energy-Harvesting Applications in 28-nm CMOS

IEEE journal of solid-state circuits, 2018-06, Vol.53 (6), p.1618-1627

2018

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A 0.18 mu m foundry RF CMOS technology with 70GHz FT for single chip system solutions

IEEE MTT-S International Microwave Symposium digest, 2001, Vol.1, p.1869-1872

2001

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A 0.19 mm 2 10 b 2.3 GS/s 12-Way Time-Interleaved Pipelined-SAR ADC in 65-nm CMOS

IEEE transactions on circuits and systems. I, Regular papers, 2018-11, Vol.65 (11), p.3606-3616

2018

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A 0.19 mm2 10 b 2.3 GS/s 12-Way Time-Interleaved Pipelined-SAR ADC in 65-nm CMOS

IEEE transactions on circuits and systems. I, Regular papers, 2018-11, Vol.65 (11), p.3606-3616

2018

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La 0.2 Sr 0.25 Ca 0.45 TiO 3 Surface Reactivity with H 2 : A Combined Operando NEXAFS and Computational Study

The journal of physical chemistry letters, 2024-08, Vol.15 (33), p.8540-8548

2024

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A 0.2-V Energy-Harvesting BLE Transmitter With a Micropower Manager Achieving 25% System Efficiency at 0-dBm Output and 5.2-nW Sleep Power in 28-nm CMOS

IEEE journal of solid-state circuits, 2019-05, Vol.54 (5), p.1351-1362

2019

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Na 0.25 Cu 0.75 VO 3 : A New Perovskite-like Vanadium Bronze

Inorganic materials, 2004-02, Vol.40 (2), p.184-187

2004

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A 0.27mm2 13.5dBm 2.4GHz all-digital polar transmitter using 34%-efficiency Class-D DPA in 40nm CMOS

2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers, 2013, p.342-343

2013

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A 0.2V energy-harvesting BLE transmitter with a micropower manager achieving 25% system efficiency at 0dBm output and 5.2nW sleep power in 28nm CMOS

2018 IEEE International Solid - State Circuits Conference - (ISSCC), 2018, p.450-452

2018

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In 0.4Ga 0.6As Gunn Diodes with a m-n : InP1-x Asx Cathode

Telecommunications & radio engineering, 2002, Vol.57 (6-7), p.7

2002

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0.5981 μm Sum Frequency Mixing in KTP Crystal

Chinese physics letters, 1991-04, Vol.8 (4), p.215-217

1991

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A 0.042-mm2 fully integrated analog PLL with stacked capacitor-inductor in 45nm CMOS

A 0.044-mm 2 0.5-to-7-GHz Resistor-Plus-Source-Follower-Feedback Noise-Cancelling LNA Achieving a Flat NF of 3.3±0.45 dB

A 0.044-mm2 0.5-to-7-GHz Resistor-Plus-Source-Follower-Feedback Noise-Cancelling LNA Achieving a Flat NF of 3.3±0.45 dB

A 0.05- ^ 2.91-nJ/Decision Keyword-Spotting (KWS) Chip Featuring an Always-Retention 5T-SRAM in 28-nm CMOS

A 0.05-mm 2 2.91-nJ/Decision Keyword-Spotting (KWS) Chip Featuring an Always-Retention 5T-SRAM in 28-nm CMOS

A 0.05-mm2 2.91-nJ/Decision Keyword-Spotting (KWS) Chip Featuring an Always-Retention 5T-SRAM in 28-nm CMOS

A 0.096-mm ^~1 -20-GHz Triple-Path Noise- Canceling Common-Gate Common-Source LNA With Dual Complementary pMOS-nMOS Configuration

A 0.096-mm[Formula Omitted]–20-GHz Triple-Path Noise- Canceling Common-Gate Common-Source LNA With Dual Complementary pMOS–nMOS Configuration

A 0.12-mm 2 1.2-to-2.4-mW 1.3-to-2.65-GHz Fractional-N Bang-Bang Digital PLL With 8-$\mu$ s Settling Time for Multi-ISM-Band ULP Radios

A 0.12-mm2 1.2-to-2.4-mW 1.3-to-2.65-GHz Fractional-N Bang-Bang Digital PLL With 8-[Formula Omitted]s Settling Time for Multi-ISM-Band ULP Radios

A 0.12-mm2 1.2-to-2.4-mW 1.3-to-2.65-GHz Fractional-N Bang-Bang Digital PLL With 8- \mu s Settling Time for Multi-ISM-Band ULP Radios

A 0.15 /spl mu/m CMOS foundry technology with 0.1 /spl mu/m devices for high performance applications

0.18 /spl mu/m metal gate fully-depleted SOI MOSFETs for advanced CMOS applications

A 0.18-V 382-[Formula Omitted]W Bluetooth Low-Energy Receiver Front-End With 1.33-nW Sleep Power for Energy-Harvesting Applications in 28-nm CMOS

A 0.18-V 382- \mu W Bluetooth Low-Energy Receiver Front-End With 1.33-nW Sleep Power for Energy-Harvesting Applications in 28-nm CMOS

A 0.18 mu m foundry RF CMOS technology with 70GHz FT for single chip system solutions

A 0.19 mm 2 10 b 2.3 GS/s 12-Way Time-Interleaved Pipelined-SAR ADC in 65-nm CMOS

A 0.19 mm2 10 b 2.3 GS/s 12-Way Time-Interleaved Pipelined-SAR ADC in 65-nm CMOS

La 0.2 Sr 0.25 Ca 0.45 TiO 3 Surface Reactivity with H 2 : A Combined Operando NEXAFS and Computational Study

A 0.2-V Energy-Harvesting BLE Transmitter With a Micropower Manager Achieving 25% System Efficiency at 0-dBm Output and 5.2-nW Sleep Power in 28-nm CMOS

Na 0.25 Cu 0.75 VO 3 : A New Perovskite-like Vanadium Bronze

A 0.27mm2 13.5dBm 2.4GHz all-digital polar transmitter using 34%-efficiency Class-D DPA in 40nm CMOS

A 0.2V energy-harvesting BLE transmitter with a micropower manager achieving 25% system efficiency at 0dBm output and 5.2nW sleep power in 28nm CMOS

In 0.4Ga 0.6As Gunn Diodes with a m-n : InP1-x Asx Cathode

0.5981 μm Sum Frequency Mixing in KTP Crystal

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