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A Review of Artificial Spiking Neuron Devices for Neural Processing and Sensing

Advanced functional materials, 2022-08, Vol.32 (33), p.n/a

2022

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All‐Solid‐State Ion Synaptic Transistor for Wafer‐Scale Integration with Electrolyte of a Nanoscale Thickness

Advanced functional materials, 2021-06, Vol.31 (23), p.n/a

2021

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Mimicry of Excitatory and Inhibitory Artificial Neuron With Leaky Integrate-and-Fire Function by a Single MOSFET

IEEE electron device letters, 2020-02, Vol.41 (2), p.208-211

2020

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A Vertical Silicon Nanowire Based Single Transistor Neuron with Excitatory, Inhibitory, and Myelination Functions for Highly Scalable Neuromorphic Hardware

Small (Weinheim an der Bergstrasse, Germany), 2021-12, Vol.17 (49), p.e2103775-n/a

2021

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Capacitive Synaptor With Overturned Charge Injection for Compute-in-Memory

IEEE electron device letters, 2024-05, Vol.45 (5), p.929-932

2024

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IEEE_Xplore

Bio-Inspired Organic Synaptor with In Situ Ion-Doped Ultrathin Polyelectrolyte Containing Acetylcholine-Like Cation

Small (Weinheim an der Bergstrasse, Germany), 2024-02, p.e2312283-e2312283

2024

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Artificial Olfactory Neuron for an In‐Sensor Neuromorphic Nose

Advanced science, 2022-06, Vol.9 (18), p.e2106017-n/a

2022

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Mnemonic-opto-synaptic transistor for in-sensor vision system

Scientific reports, 2022-02, Vol.12 (1), p.1818-1818, Article 1818

2022

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Improved SOI FinFETs Performance With Low-Temperature Deuterium Annealing

IEEE transactions on electron devices, 2023-07, Vol.70 (7), p.3958-3962

2023

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IEEE_Xplore

Impact of Post-Metal Annealing With Deuterium or Nitrogen for Curing a Gate Dielectric Using Joule Heat Driven by Punch-Through Current

IEEE electron device letters, 2021-02, Vol.42 (2), p.276-279

2021

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IEEE_Xplore

Ultra-fast data sanitization of SRAM by back-biasing to resist a cold boot attack

Scientific reports, 2022-01, Vol.12 (1), p.35-35, Article 35

2022

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Lowering of Schottky Barrier Height in a Vertical Pillar MOSFET by Deuterium Annealing

IEEE electron device letters, 2023-07, Vol.44 (7), p.1-1

2023

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IEEE_Xplore

Investigation of Leaky Characteristic in a Single-Transistor-Based Leaky Integrate-and-Fire Neuron

IEEE transactions on electron devices, 2021-11, Vol.68 (11), p.5912-5915

2021

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An Overturned Charge Injection Synaptic Transistor With a Floating-Gate for Neuromorphic Hardware Computing

IEEE electron device letters, 2022-09, Vol.43 (9), p.1440-1443

2022

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IEEE_Xplore

Self-Curable Synaptor With Tri-Node Charge- Trap FinFET for Semi-Supervised Learning

IEEE electron device letters, 2024-04, Vol.45 (4), p.716-719

2024

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IEEE_Xplore

Reliability Improvement of Gate-All-Around Junctionless SONOS Memory by Joule Heat From Inherent Nanowire Current

IEEE transactions on electron devices, 2022-11, Vol.69 (11), p.1-6

2022

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IEEE_Xplore

Data Sanitization of SRAM by Thermal Distortion

IEEE transactions on electron devices, 2021-07, Vol.68 (7), p.3706-3710

2021

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IEEE_Xplore

A Temperature Sensor With a Thermillator

IEEE electron device letters, 2021-11, Vol.42 (11), p.1654-1657

2021

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IEEE_Xplore

Thermally Stable Single-Transistor Neuron for Reliable Neuromorphic System

IEEE electron device letters, 2022-11, Vol.43 (11), p.1-1

2022

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IEEE_Xplore

Tunable and Reconfigurable Logic Gates With Electrolyte-Gated Transistor Array Co-Integrated With Neuromorphic Synapses

IEEE transactions on electron devices, 2022-08, Vol.69 (8), p.4231-4235

2022

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IEEE_Xplore

Quantitative Analysis of High-Pressure Deuterium Annealing Effects on Vertically Stacked Gate-All-Around SONOS Memory

IEEE transactions on electron devices, 2020-09, Vol.67 (9), p.1-5

2020

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IEEE_Xplore

Cointegration of single-transistor neurons and synapses by nanoscale CMOS fabrication for highly scalable neuromorphic hardware

Science advances, 2021-08, Vol.7 (32)

2021

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Ternary logic decoder using independently controlled double-gate Si-NW MOSFETs

Scientific reports, 2021-06, Vol.11 (1), p.13018-13018, Article 13018

2021

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Reliability Improvement of Gate-All-Around SONOS Memory by Joule Heat From Gate-Induced Drain Leakage Current

IEEE transactions on electron devices, 2022-01, Vol.69 (1), p.115-119

2022

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IEEE_Xplore

Physically Unclonable Function With a Rough Silicon Channel MOSFET

IEEE transactions on electron devices, 2024-01, Vol.71 (1), p.425-430

2024

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IEEE_Xplore

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A Review of Artificial Spiking Neuron Devices for Neural Processing and Sensing

All‐Solid‐State Ion Synaptic Transistor for Wafer‐Scale Integration with Electrolyte of a Nanoscale Thickness

Mimicry of Excitatory and Inhibitory Artificial Neuron With Leaky Integrate-and-Fire Function by a Single MOSFET

A Vertical Silicon Nanowire Based Single Transistor Neuron with Excitatory, Inhibitory, and Myelination Functions for Highly Scalable Neuromorphic Hardware

Capacitive Synaptor With Overturned Charge Injection for Compute-in-Memory

Bio-Inspired Organic Synaptor with In Situ Ion-Doped Ultrathin Polyelectrolyte Containing Acetylcholine-Like Cation

Artificial Olfactory Neuron for an In‐Sensor Neuromorphic Nose

Mnemonic-opto-synaptic transistor for in-sensor vision system

Improved SOI FinFETs Performance With Low-Temperature Deuterium Annealing

Impact of Post-Metal Annealing With Deuterium or Nitrogen for Curing a Gate Dielectric Using Joule Heat Driven by Punch-Through Current

Ultra-fast data sanitization of SRAM by back-biasing to resist a cold boot attack

Lowering of Schottky Barrier Height in a Vertical Pillar MOSFET by Deuterium Annealing

Investigation of Leaky Characteristic in a Single-Transistor-Based Leaky Integrate-and-Fire Neuron

An Overturned Charge Injection Synaptic Transistor With a Floating-Gate for Neuromorphic Hardware Computing

Self-Curable Synaptor With Tri-Node Charge- Trap FinFET for Semi-Supervised Learning

Reliability Improvement of Gate-All-Around Junctionless SONOS Memory by Joule Heat From Inherent Nanowire Current

Data Sanitization of SRAM by Thermal Distortion

A Temperature Sensor With a Thermillator

Thermally Stable Single-Transistor Neuron for Reliable Neuromorphic System

Tunable and Reconfigurable Logic Gates With Electrolyte-Gated Transistor Array Co-Integrated With Neuromorphic Synapses

Quantitative Analysis of High-Pressure Deuterium Annealing Effects on Vertically Stacked Gate-All-Around SONOS Memory

Cointegration of single-transistor neurons and synapses by nanoscale CMOS fabrication for highly scalable neuromorphic hardware

Ternary logic decoder using independently controlled double-gate Si-NW MOSFETs

Reliability Improvement of Gate-All-Around SONOS Memory by Joule Heat From Gate-Induced Drain Leakage Current

Physically Unclonable Function With a Rough Silicon Channel MOSFET

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